staging: iio: lis3l02dq: use iio_sw_ring_helper_state and funcs
Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk> Acked-by: Barry Song <21cnbao@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
parent
59883ba170
commit
73bce12e44
@ -148,30 +148,29 @@ Form of high byte dependant on justification set in ctrl reg */
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#define LIS3L02DQ_MAX_RX 12
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#define LIS3L02DQ_MAX_RX 12
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/**
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/**
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* struct lis3l02dq_state - device instance specific data
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* struct lis3l02dq_state - device instance specific data
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* @helper: data and func pointer allowing generic functions
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* @us: actual spi_device
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* @us: actual spi_device
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* @work_trigger_to_ring: bh for triggered event handling
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* @work_thresh: bh for threshold events
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* @work_thresh: bh for threshold events
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* @inter: used to check if new interrupt has been triggered
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* @inter: used to check if new interrupt has been triggered
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* @last_timestamp: passing timestamp from th to bh of interrupt handler
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* @indio_dev: industrial I/O device structure
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* @trig: data ready trigger registered with iio
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* @trig: data ready trigger registered with iio
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* @tx: transmit buffer
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* @tx: transmit buffer
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* @rx: recieve buffer
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* @rx: recieve buffer
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* @buf_lock: mutex to protect tx and rx
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* @buf_lock: mutex to protect tx and rx
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**/
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**/
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struct lis3l02dq_state {
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struct lis3l02dq_state {
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struct iio_sw_ring_helper_state help;
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struct spi_device *us;
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struct spi_device *us;
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struct work_struct work_trigger_to_ring;
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struct work_struct work_thresh;
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struct work_struct work_thresh;
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bool inter;
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bool inter;
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s64 last_timestamp;
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struct iio_dev *indio_dev;
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struct iio_trigger *trig;
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struct iio_trigger *trig;
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u8 *tx;
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u8 *tx;
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u8 *rx;
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u8 *rx;
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struct mutex buf_lock;
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struct mutex buf_lock;
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};
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};
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#define lis3l02dq_h_to_s(_h) \
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container_of(_h, struct lis3l02dq_state, help)
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int lis3l02dq_spi_read_reg_8(struct device *dev,
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int lis3l02dq_spi_read_reg_8(struct device *dev,
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u8 reg_address,
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u8 reg_address,
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u8 *val);
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u8 *val);
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@ -28,6 +28,8 @@
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#include "../iio.h"
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#include "../iio.h"
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#include "../sysfs.h"
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#include "../sysfs.h"
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#include "../ring_generic.h"
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#include "../ring_generic.h"
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#include "../ring_sw.h"
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#include "accel.h"
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#include "accel.h"
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#include "lis3l02dq.h"
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#include "lis3l02dq.h"
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@ -48,7 +50,9 @@ int lis3l02dq_spi_read_reg_8(struct device *dev, u8 reg_address, u8 *val)
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int ret;
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int ret;
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struct spi_message msg;
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struct spi_message msg;
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct lis3l02dq_state *st = iio_dev_get_devdata(indio_dev);
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struct iio_sw_ring_helper_state *h = iio_dev_get_devdata(indio_dev);
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struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
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struct spi_transfer xfer = {
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struct spi_transfer xfer = {
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.tx_buf = st->tx,
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.tx_buf = st->tx,
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.rx_buf = st->rx,
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.rx_buf = st->rx,
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@ -83,7 +87,9 @@ int lis3l02dq_spi_write_reg_8(struct device *dev,
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int ret;
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int ret;
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struct spi_message msg;
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struct spi_message msg;
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct lis3l02dq_state *st = iio_dev_get_devdata(indio_dev);
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struct iio_sw_ring_helper_state *h
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= iio_dev_get_devdata(indio_dev);
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struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
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struct spi_transfer xfer = {
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struct spi_transfer xfer = {
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.tx_buf = st->tx,
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.tx_buf = st->tx,
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.bits_per_word = 8,
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.bits_per_word = 8,
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@ -117,7 +123,9 @@ static int lis3l02dq_spi_write_reg_s16(struct device *dev,
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int ret;
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int ret;
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struct spi_message msg;
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struct spi_message msg;
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct lis3l02dq_state *st = iio_dev_get_devdata(indio_dev);
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struct iio_sw_ring_helper_state *h
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= iio_dev_get_devdata(indio_dev);
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struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
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struct spi_transfer xfers[] = { {
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struct spi_transfer xfers[] = { {
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.tx_buf = st->tx,
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.tx_buf = st->tx,
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.bits_per_word = 8,
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.bits_per_word = 8,
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@ -159,7 +167,9 @@ static int lis3l02dq_spi_read_reg_s16(struct device *dev,
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{
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{
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struct spi_message msg;
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struct spi_message msg;
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct lis3l02dq_state *st = iio_dev_get_devdata(indio_dev);
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struct iio_sw_ring_helper_state *h
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= iio_dev_get_devdata(indio_dev);
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struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
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int ret;
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int ret;
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struct spi_transfer xfers[] = { {
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struct spi_transfer xfers[] = { {
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.tx_buf = st->tx,
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.tx_buf = st->tx,
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@ -412,7 +422,7 @@ static int lis3l02dq_initial_setup(struct lis3l02dq_state *st)
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val = LIS3L02DQ_DEFAULT_CTRL1;
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val = LIS3L02DQ_DEFAULT_CTRL1;
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/* Write suitable defaults to ctrl1 */
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/* Write suitable defaults to ctrl1 */
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ret = lis3l02dq_spi_write_reg_8(&st->indio_dev->dev,
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ret = lis3l02dq_spi_write_reg_8(&st->help.indio_dev->dev,
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LIS3L02DQ_REG_CTRL_1_ADDR,
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LIS3L02DQ_REG_CTRL_1_ADDR,
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&val);
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&val);
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if (ret) {
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if (ret) {
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@ -420,7 +430,7 @@ static int lis3l02dq_initial_setup(struct lis3l02dq_state *st)
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goto err_ret;
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goto err_ret;
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}
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}
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/* Repeat as sometimes doesn't work first time?*/
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/* Repeat as sometimes doesn't work first time?*/
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ret = lis3l02dq_spi_write_reg_8(&st->indio_dev->dev,
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ret = lis3l02dq_spi_write_reg_8(&st->help.indio_dev->dev,
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LIS3L02DQ_REG_CTRL_1_ADDR,
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LIS3L02DQ_REG_CTRL_1_ADDR,
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&val);
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&val);
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if (ret) {
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if (ret) {
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@ -430,17 +440,17 @@ static int lis3l02dq_initial_setup(struct lis3l02dq_state *st)
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/* Read back to check this has worked acts as loose test of correct
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/* Read back to check this has worked acts as loose test of correct
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* chip */
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* chip */
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ret = lis3l02dq_spi_read_reg_8(&st->indio_dev->dev,
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ret = lis3l02dq_spi_read_reg_8(&st->help.indio_dev->dev,
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LIS3L02DQ_REG_CTRL_1_ADDR,
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LIS3L02DQ_REG_CTRL_1_ADDR,
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&valtest);
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&valtest);
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if (ret || (valtest != val)) {
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if (ret || (valtest != val)) {
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dev_err(&st->indio_dev->dev, "device not playing ball");
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dev_err(&st->help.indio_dev->dev, "device not playing ball");
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ret = -EINVAL;
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ret = -EINVAL;
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goto err_ret;
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goto err_ret;
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}
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}
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val = LIS3L02DQ_DEFAULT_CTRL2;
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val = LIS3L02DQ_DEFAULT_CTRL2;
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ret = lis3l02dq_spi_write_reg_8(&st->indio_dev->dev,
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ret = lis3l02dq_spi_write_reg_8(&st->help.indio_dev->dev,
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LIS3L02DQ_REG_CTRL_2_ADDR,
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LIS3L02DQ_REG_CTRL_2_ADDR,
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&val);
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&val);
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if (ret) {
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if (ret) {
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@ -449,7 +459,7 @@ static int lis3l02dq_initial_setup(struct lis3l02dq_state *st)
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}
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}
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val = LIS3L02DQ_REG_WAKE_UP_CFG_LATCH_SRC;
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val = LIS3L02DQ_REG_WAKE_UP_CFG_LATCH_SRC;
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ret = lis3l02dq_spi_write_reg_8(&st->indio_dev->dev,
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ret = lis3l02dq_spi_write_reg_8(&st->help.indio_dev->dev,
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LIS3L02DQ_REG_WAKE_UP_CFG_ADDR,
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LIS3L02DQ_REG_WAKE_UP_CFG_ADDR,
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&val);
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&val);
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if (ret)
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if (ret)
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@ -595,15 +605,17 @@ error_mutex_unlock:
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}
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}
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static int lis3l02dq_thresh_handler_th(struct iio_dev *dev_info,
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static int lis3l02dq_thresh_handler_th(struct iio_dev *indio_dev,
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int index,
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int index,
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s64 timestamp,
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s64 timestamp,
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int no_test)
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int no_test)
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{
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{
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struct lis3l02dq_state *st = dev_info->dev_data;
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struct iio_sw_ring_helper_state *h
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= iio_dev_get_devdata(indio_dev);
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struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
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/* Stash the timestamp somewhere convenient for the bh */
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/* Stash the timestamp somewhere convenient for the bh */
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st->last_timestamp = timestamp;
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h->last_timestamp = timestamp;
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schedule_work(&st->work_thresh);
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schedule_work(&st->work_thresh);
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return 0;
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return 0;
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@ -621,43 +633,43 @@ static void lis3l02dq_thresh_handler_bh_no_check(struct work_struct *work_s)
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u8 t;
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u8 t;
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lis3l02dq_spi_read_reg_8(&st->indio_dev->dev,
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lis3l02dq_spi_read_reg_8(&st->help.indio_dev->dev,
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LIS3L02DQ_REG_WAKE_UP_SRC_ADDR,
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LIS3L02DQ_REG_WAKE_UP_SRC_ADDR,
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&t);
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&t);
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if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Z_HIGH)
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if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Z_HIGH)
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iio_push_event(st->indio_dev, 0,
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iio_push_event(st->help.indio_dev, 0,
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IIO_EVENT_CODE_ACCEL_Z_HIGH,
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IIO_EVENT_CODE_ACCEL_Z_HIGH,
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st->last_timestamp);
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st->help.last_timestamp);
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if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Z_LOW)
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if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Z_LOW)
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iio_push_event(st->indio_dev, 0,
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iio_push_event(st->help.indio_dev, 0,
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IIO_EVENT_CODE_ACCEL_Z_LOW,
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IIO_EVENT_CODE_ACCEL_Z_LOW,
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st->last_timestamp);
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st->help.last_timestamp);
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if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Y_HIGH)
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if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Y_HIGH)
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iio_push_event(st->indio_dev, 0,
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iio_push_event(st->help.indio_dev, 0,
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IIO_EVENT_CODE_ACCEL_Y_HIGH,
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IIO_EVENT_CODE_ACCEL_Y_HIGH,
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st->last_timestamp);
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st->help.last_timestamp);
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if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Y_LOW)
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if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_Y_LOW)
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iio_push_event(st->indio_dev, 0,
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iio_push_event(st->help.indio_dev, 0,
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IIO_EVENT_CODE_ACCEL_Y_LOW,
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IIO_EVENT_CODE_ACCEL_Y_LOW,
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st->last_timestamp);
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st->help.last_timestamp);
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if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_X_HIGH)
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if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_X_HIGH)
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iio_push_event(st->indio_dev, 0,
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iio_push_event(st->help.indio_dev, 0,
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IIO_EVENT_CODE_ACCEL_X_HIGH,
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IIO_EVENT_CODE_ACCEL_X_HIGH,
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st->last_timestamp);
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st->help.last_timestamp);
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if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_X_LOW)
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if (t & LIS3L02DQ_REG_WAKE_UP_SRC_INTERRUPT_X_LOW)
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iio_push_event(st->indio_dev, 0,
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iio_push_event(st->help.indio_dev, 0,
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IIO_EVENT_CODE_ACCEL_X_LOW,
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IIO_EVENT_CODE_ACCEL_X_LOW,
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st->last_timestamp);
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st->help.last_timestamp);
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/* reenable the irq */
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/* reenable the irq */
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enable_irq(st->us->irq);
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enable_irq(st->us->irq);
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/* Ack and allow for new interrupts */
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/* Ack and allow for new interrupts */
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lis3l02dq_spi_read_reg_8(&st->indio_dev->dev,
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lis3l02dq_spi_read_reg_8(&st->help.indio_dev->dev,
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LIS3L02DQ_REG_WAKE_UP_ACK_ADDR,
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LIS3L02DQ_REG_WAKE_UP_ACK_ADDR,
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&t);
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&t);
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@ -769,30 +781,30 @@ static int __devinit lis3l02dq_probe(struct spi_device *spi)
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st->us = spi;
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st->us = spi;
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mutex_init(&st->buf_lock);
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mutex_init(&st->buf_lock);
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/* setup the industrialio driver allocated elements */
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/* setup the industrialio driver allocated elements */
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st->indio_dev = iio_allocate_device();
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st->help.indio_dev = iio_allocate_device();
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if (st->indio_dev == NULL) {
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if (st->help.indio_dev == NULL) {
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ret = -ENOMEM;
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ret = -ENOMEM;
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goto error_free_tx;
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goto error_free_tx;
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}
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}
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st->indio_dev->dev.parent = &spi->dev;
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st->help.indio_dev->dev.parent = &spi->dev;
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st->indio_dev->num_interrupt_lines = 1;
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st->help.indio_dev->num_interrupt_lines = 1;
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st->indio_dev->event_attrs = &lis3l02dq_event_attribute_group;
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st->help.indio_dev->event_attrs = &lis3l02dq_event_attribute_group;
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st->indio_dev->attrs = &lis3l02dq_attribute_group;
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st->help.indio_dev->attrs = &lis3l02dq_attribute_group;
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st->indio_dev->dev_data = (void *)(st);
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st->help.indio_dev->dev_data = (void *)(&st->help);
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st->indio_dev->driver_module = THIS_MODULE;
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st->help.indio_dev->driver_module = THIS_MODULE;
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st->indio_dev->modes = INDIO_DIRECT_MODE;
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st->help.indio_dev->modes = INDIO_DIRECT_MODE;
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ret = lis3l02dq_configure_ring(st->indio_dev);
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ret = lis3l02dq_configure_ring(st->help.indio_dev);
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if (ret)
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if (ret)
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goto error_free_dev;
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goto error_free_dev;
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ret = iio_device_register(st->indio_dev);
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ret = iio_device_register(st->help.indio_dev);
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if (ret)
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if (ret)
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goto error_unreg_ring_funcs;
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goto error_unreg_ring_funcs;
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regdone = 1;
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regdone = 1;
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ret = iio_ring_buffer_register(st->indio_dev->ring, 0);
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ret = iio_ring_buffer_register(st->help.indio_dev->ring, 0);
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if (ret) {
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if (ret) {
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printk(KERN_ERR "failed to initialize the ring\n");
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printk(KERN_ERR "failed to initialize the ring\n");
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goto error_unreg_ring_funcs;
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goto error_unreg_ring_funcs;
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@ -801,14 +813,14 @@ static int __devinit lis3l02dq_probe(struct spi_device *spi)
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if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0) {
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if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0) {
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st->inter = 0;
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st->inter = 0;
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ret = iio_register_interrupt_line(spi->irq,
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ret = iio_register_interrupt_line(spi->irq,
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st->indio_dev,
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st->help.indio_dev,
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0,
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0,
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IRQF_TRIGGER_RISING,
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IRQF_TRIGGER_RISING,
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"lis3l02dq");
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"lis3l02dq");
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if (ret)
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if (ret)
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goto error_uninitialize_ring;
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goto error_uninitialize_ring;
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ret = lis3l02dq_probe_trigger(st->indio_dev);
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ret = lis3l02dq_probe_trigger(st->help.indio_dev);
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if (ret)
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if (ret)
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goto error_unregister_line;
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goto error_unregister_line;
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}
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}
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@ -820,20 +832,20 @@ static int __devinit lis3l02dq_probe(struct spi_device *spi)
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return 0;
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return 0;
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||||||
|
|
||||||
error_remove_trigger:
|
error_remove_trigger:
|
||||||
if (st->indio_dev->modes & INDIO_RING_TRIGGERED)
|
if (st->help.indio_dev->modes & INDIO_RING_TRIGGERED)
|
||||||
lis3l02dq_remove_trigger(st->indio_dev);
|
lis3l02dq_remove_trigger(st->help.indio_dev);
|
||||||
error_unregister_line:
|
error_unregister_line:
|
||||||
if (st->indio_dev->modes & INDIO_RING_TRIGGERED)
|
if (st->help.indio_dev->modes & INDIO_RING_TRIGGERED)
|
||||||
iio_unregister_interrupt_line(st->indio_dev, 0);
|
iio_unregister_interrupt_line(st->help.indio_dev, 0);
|
||||||
error_uninitialize_ring:
|
error_uninitialize_ring:
|
||||||
iio_ring_buffer_unregister(st->indio_dev->ring);
|
iio_ring_buffer_unregister(st->help.indio_dev->ring);
|
||||||
error_unreg_ring_funcs:
|
error_unreg_ring_funcs:
|
||||||
lis3l02dq_unconfigure_ring(st->indio_dev);
|
lis3l02dq_unconfigure_ring(st->help.indio_dev);
|
||||||
error_free_dev:
|
error_free_dev:
|
||||||
if (regdone)
|
if (regdone)
|
||||||
iio_device_unregister(st->indio_dev);
|
iio_device_unregister(st->help.indio_dev);
|
||||||
else
|
else
|
||||||
iio_free_device(st->indio_dev);
|
iio_free_device(st->help.indio_dev);
|
||||||
error_free_tx:
|
error_free_tx:
|
||||||
kfree(st->tx);
|
kfree(st->tx);
|
||||||
error_free_rx:
|
error_free_rx:
|
||||||
@ -848,7 +860,9 @@ error_ret:
|
|||||||
static int lis3l02dq_stop_device(struct iio_dev *indio_dev)
|
static int lis3l02dq_stop_device(struct iio_dev *indio_dev)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
struct lis3l02dq_state *st = indio_dev->dev_data;
|
struct iio_sw_ring_helper_state *h
|
||||||
|
= iio_dev_get_devdata(indio_dev);
|
||||||
|
struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
|
||||||
u8 val = 0;
|
u8 val = 0;
|
||||||
|
|
||||||
mutex_lock(&indio_dev->mlock);
|
mutex_lock(&indio_dev->mlock);
|
||||||
@ -875,7 +889,7 @@ static int lis3l02dq_remove(struct spi_device *spi)
|
|||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
struct lis3l02dq_state *st = spi_get_drvdata(spi);
|
struct lis3l02dq_state *st = spi_get_drvdata(spi);
|
||||||
struct iio_dev *indio_dev = st->indio_dev;
|
struct iio_dev *indio_dev = st->help.indio_dev;
|
||||||
|
|
||||||
ret = lis3l02dq_stop_device(indio_dev);
|
ret = lis3l02dq_stop_device(indio_dev);
|
||||||
if (ret)
|
if (ret)
|
||||||
|
@ -105,11 +105,13 @@ static struct attribute_group lis3l02dq_scan_el_group = {
|
|||||||
**/
|
**/
|
||||||
static void lis3l02dq_poll_func_th(struct iio_dev *indio_dev, s64 time)
|
static void lis3l02dq_poll_func_th(struct iio_dev *indio_dev, s64 time)
|
||||||
{
|
{
|
||||||
struct lis3l02dq_state *st = iio_dev_get_devdata(indio_dev);
|
struct iio_sw_ring_helper_state *h
|
||||||
st->last_timestamp = time;
|
= iio_dev_get_devdata(indio_dev);
|
||||||
schedule_work(&st->work_trigger_to_ring);
|
struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
|
||||||
/* Indicate that this interrupt is being handled */
|
/* in this case we need to slightly extend the helper function */
|
||||||
|
iio_sw_poll_func_th(indio_dev, time);
|
||||||
|
|
||||||
|
/* Indicate that this interrupt is being handled */
|
||||||
/* Technically this is trigger related, but without this
|
/* Technically this is trigger related, but without this
|
||||||
* handler running there is currently now way for the interrupt
|
* handler running there is currently now way for the interrupt
|
||||||
* to clear.
|
* to clear.
|
||||||
@ -120,15 +122,16 @@ static void lis3l02dq_poll_func_th(struct iio_dev *indio_dev, s64 time)
|
|||||||
/**
|
/**
|
||||||
* lis3l02dq_data_rdy_trig_poll() the event handler for the data rdy trig
|
* lis3l02dq_data_rdy_trig_poll() the event handler for the data rdy trig
|
||||||
**/
|
**/
|
||||||
static int lis3l02dq_data_rdy_trig_poll(struct iio_dev *dev_info,
|
static int lis3l02dq_data_rdy_trig_poll(struct iio_dev *indio_dev,
|
||||||
int index,
|
int index,
|
||||||
s64 timestamp,
|
s64 timestamp,
|
||||||
int no_test)
|
int no_test)
|
||||||
{
|
{
|
||||||
struct lis3l02dq_state *st = iio_dev_get_devdata(dev_info);
|
struct iio_sw_ring_helper_state *h
|
||||||
struct iio_trigger *trig = st->trig;
|
= iio_dev_get_devdata(indio_dev);
|
||||||
|
struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
|
||||||
|
|
||||||
iio_trigger_poll(trig, timestamp);
|
iio_trigger_poll(st->trig, timestamp);
|
||||||
|
|
||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
@ -212,7 +215,7 @@ static int lis3l02dq_read_all(struct lis3l02dq_state *st, u8 *rx_array)
|
|||||||
struct spi_message msg;
|
struct spi_message msg;
|
||||||
int ret, i, j = 0;
|
int ret, i, j = 0;
|
||||||
|
|
||||||
xfers = kzalloc((st->indio_dev->scan_count) * 2
|
xfers = kzalloc((st->help.indio_dev->scan_count) * 2
|
||||||
* sizeof(*xfers), GFP_KERNEL);
|
* sizeof(*xfers), GFP_KERNEL);
|
||||||
if (!xfers)
|
if (!xfers)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
@ -220,7 +223,7 @@ static int lis3l02dq_read_all(struct lis3l02dq_state *st, u8 *rx_array)
|
|||||||
mutex_lock(&st->buf_lock);
|
mutex_lock(&st->buf_lock);
|
||||||
|
|
||||||
for (i = 0; i < ARRAY_SIZE(read_all_tx_array)/4; i++) {
|
for (i = 0; i < ARRAY_SIZE(read_all_tx_array)/4; i++) {
|
||||||
if (st->indio_dev->scan_mask & (1 << i)) {
|
if (st->help.indio_dev->scan_mask & (1 << i)) {
|
||||||
/* lower byte */
|
/* lower byte */
|
||||||
xfers[j].tx_buf = st->tx + 2*j;
|
xfers[j].tx_buf = st->tx + 2*j;
|
||||||
st->tx[2*j] = read_all_tx_array[i*4];
|
st->tx[2*j] = read_all_tx_array[i*4];
|
||||||
@ -248,7 +251,7 @@ static int lis3l02dq_read_all(struct lis3l02dq_state *st, u8 *rx_array)
|
|||||||
* values in alternate bytes
|
* values in alternate bytes
|
||||||
*/
|
*/
|
||||||
spi_message_init(&msg);
|
spi_message_init(&msg);
|
||||||
for (j = 0; j < st->indio_dev->scan_count * 2; j++)
|
for (j = 0; j < st->help.indio_dev->scan_count * 2; j++)
|
||||||
spi_message_add_tail(&xfers[j], &msg);
|
spi_message_add_tail(&xfers[j], &msg);
|
||||||
|
|
||||||
ret = spi_sync(st->us, &msg);
|
ret = spi_sync(st->us, &msg);
|
||||||
@ -258,62 +261,36 @@ static int lis3l02dq_read_all(struct lis3l02dq_state *st, u8 *rx_array)
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/* Whilst this makes a lot of calls to iio_sw_ring functions - it is to device
|
|
||||||
* specific to be rolled into the core.
|
|
||||||
*/
|
|
||||||
static void lis3l02dq_trigger_bh_to_ring(struct work_struct *work_s)
|
static void lis3l02dq_trigger_bh_to_ring(struct work_struct *work_s)
|
||||||
{
|
{
|
||||||
struct lis3l02dq_state *st
|
struct iio_sw_ring_helper_state *h
|
||||||
= container_of(work_s, struct lis3l02dq_state,
|
= container_of(work_s, struct iio_sw_ring_helper_state,
|
||||||
work_trigger_to_ring);
|
work_trigger_to_ring);
|
||||||
|
struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
|
||||||
|
|
||||||
u8 *rx_array;
|
|
||||||
int i = 0;
|
|
||||||
u16 *data;
|
|
||||||
size_t datasize = st->indio_dev
|
|
||||||
->ring->access.get_bpd(st->indio_dev->ring);
|
|
||||||
|
|
||||||
data = kmalloc(datasize , GFP_KERNEL);
|
|
||||||
if (data == NULL) {
|
|
||||||
dev_err(&st->us->dev, "memory alloc failed in ring bh");
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
/* Due to interleaved nature of transmission this buffer must be
|
|
||||||
* twice the number of bytes, or 4 times the number of channels
|
|
||||||
*/
|
|
||||||
rx_array = kmalloc(4 * (st->indio_dev->scan_count), GFP_KERNEL);
|
|
||||||
if (rx_array == NULL) {
|
|
||||||
dev_err(&st->us->dev, "memory alloc failed in ring bh");
|
|
||||||
kfree(data);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* whilst trigger specific, if this read does nto occur the data
|
|
||||||
ready interrupt will not be cleared. Need to add a mechanism
|
|
||||||
to provide a dummy read function if this is not triggering on
|
|
||||||
the data ready function but something else is.
|
|
||||||
*/
|
|
||||||
st->inter = 0;
|
st->inter = 0;
|
||||||
|
iio_sw_trigger_bh_to_ring(work_s);
|
||||||
|
}
|
||||||
|
|
||||||
if (st->indio_dev->scan_count)
|
static int lis3l02dq_get_ring_element(struct iio_sw_ring_helper_state *h,
|
||||||
if (lis3l02dq_read_all(st, rx_array) >= 0)
|
u8 *buf)
|
||||||
for (; i < st->indio_dev->scan_count; i++)
|
{
|
||||||
data[i] = combine_8_to_16(rx_array[i*4+1],
|
int ret, i;
|
||||||
rx_array[i*4+3]);
|
u8 *rx_array ;
|
||||||
/* Guaranteed to be aligned with 8 byte boundary */
|
s16 *data = (s16 *)buf;
|
||||||
if (st->indio_dev->scan_timestamp)
|
|
||||||
*((s64 *)(data + ((i + 3)/4)*4)) = st->last_timestamp;
|
|
||||||
|
|
||||||
st->indio_dev->ring->access.store_to(st->indio_dev->ring,
|
rx_array = kzalloc(4 * (h->indio_dev->scan_count), GFP_KERNEL);
|
||||||
(u8 *)data,
|
if (rx_array == NULL)
|
||||||
st->last_timestamp);
|
return -ENOMEM;
|
||||||
|
ret = lis3l02dq_read_all(lis3l02dq_h_to_s(h), rx_array);
|
||||||
iio_trigger_notify_done(st->indio_dev->trig);
|
if (ret < 0)
|
||||||
|
return ret;
|
||||||
|
for (i = 0; i < h->indio_dev->scan_count; i++)
|
||||||
|
data[i] = combine_8_to_16(rx_array[i*4+1],
|
||||||
|
rx_array[i*4+3]);
|
||||||
kfree(rx_array);
|
kfree(rx_array);
|
||||||
kfree(data);
|
|
||||||
|
|
||||||
return;
|
return i*sizeof(data[0]);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Caller responsible for locking as necessary. */
|
/* Caller responsible for locking as necessary. */
|
||||||
@ -387,7 +364,7 @@ static int lis3l02dq_data_rdy_trigger_set_state(struct iio_trigger *trig,
|
|||||||
struct lis3l02dq_state *st = trig->private_data;
|
struct lis3l02dq_state *st = trig->private_data;
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
u8 t;
|
u8 t;
|
||||||
__lis3l02dq_write_data_ready_config(&st->indio_dev->dev,
|
__lis3l02dq_write_data_ready_config(&st->help.indio_dev->dev,
|
||||||
&iio_event_data_rdy_trig,
|
&iio_event_data_rdy_trig,
|
||||||
state);
|
state);
|
||||||
if (state == false) {
|
if (state == false) {
|
||||||
@ -397,7 +374,7 @@ static int lis3l02dq_data_rdy_trigger_set_state(struct iio_trigger *trig,
|
|||||||
/* Clear any outstanding ready events */
|
/* Clear any outstanding ready events */
|
||||||
ret = lis3l02dq_read_all(st, NULL);
|
ret = lis3l02dq_read_all(st, NULL);
|
||||||
}
|
}
|
||||||
lis3l02dq_spi_read_reg_8(&st->indio_dev->dev,
|
lis3l02dq_spi_read_reg_8(&st->help.indio_dev->dev,
|
||||||
LIS3L02DQ_REG_WAKE_UP_SRC_ADDR,
|
LIS3L02DQ_REG_WAKE_UP_SRC_ADDR,
|
||||||
&t);
|
&t);
|
||||||
return ret;
|
return ret;
|
||||||
@ -500,12 +477,12 @@ void lis3l02dq_unconfigure_ring(struct iio_dev *indio_dev)
|
|||||||
|
|
||||||
int lis3l02dq_configure_ring(struct iio_dev *indio_dev)
|
int lis3l02dq_configure_ring(struct iio_dev *indio_dev)
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret;
|
||||||
struct lis3l02dq_state *st = indio_dev->dev_data;
|
struct iio_sw_ring_helper_state *h = iio_dev_get_devdata(indio_dev);
|
||||||
struct iio_ring_buffer *ring;
|
|
||||||
INIT_WORK(&st->work_trigger_to_ring, lis3l02dq_trigger_bh_to_ring);
|
|
||||||
/* Set default scan mode */
|
|
||||||
|
|
||||||
|
INIT_WORK(&h->work_trigger_to_ring, lis3l02dq_trigger_bh_to_ring);
|
||||||
|
/* Set default scan mode */
|
||||||
|
h->get_ring_element = &lis3l02dq_get_ring_element;
|
||||||
iio_scan_mask_set(indio_dev, iio_scan_el_accel_x.number);
|
iio_scan_mask_set(indio_dev, iio_scan_el_accel_x.number);
|
||||||
iio_scan_mask_set(indio_dev, iio_scan_el_accel_y.number);
|
iio_scan_mask_set(indio_dev, iio_scan_el_accel_y.number);
|
||||||
iio_scan_mask_set(indio_dev, iio_scan_el_accel_z.number);
|
iio_scan_mask_set(indio_dev, iio_scan_el_accel_z.number);
|
||||||
@ -513,19 +490,17 @@ int lis3l02dq_configure_ring(struct iio_dev *indio_dev)
|
|||||||
|
|
||||||
indio_dev->scan_el_attrs = &lis3l02dq_scan_el_group;
|
indio_dev->scan_el_attrs = &lis3l02dq_scan_el_group;
|
||||||
|
|
||||||
ring = iio_sw_rb_allocate(indio_dev);
|
indio_dev->ring = iio_sw_rb_allocate(indio_dev);
|
||||||
if (!ring) {
|
if (!indio_dev->ring)
|
||||||
ret = -ENOMEM;
|
return -ENOMEM;
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
indio_dev->ring = ring;
|
|
||||||
/* Effectively select the ring buffer implementation */
|
/* Effectively select the ring buffer implementation */
|
||||||
iio_ring_sw_register_funcs(&ring->access);
|
iio_ring_sw_register_funcs(&indio_dev->ring->access);
|
||||||
ring->bpe = 2;
|
indio_dev->ring->bpe = 2;
|
||||||
ring->preenable = &iio_sw_ring_preenable;
|
indio_dev->ring->preenable = &iio_sw_ring_preenable;
|
||||||
ring->postenable = &iio_triggered_ring_postenable;
|
indio_dev->ring->postenable = &iio_triggered_ring_postenable;
|
||||||
ring->predisable = &iio_triggered_ring_predisable;
|
indio_dev->ring->predisable = &iio_triggered_ring_predisable;
|
||||||
ring->owner = THIS_MODULE;
|
indio_dev->ring->owner = THIS_MODULE;
|
||||||
|
|
||||||
ret = iio_alloc_pollfunc(indio_dev, NULL, &lis3l02dq_poll_func_th);
|
ret = iio_alloc_pollfunc(indio_dev, NULL, &lis3l02dq_poll_func_th);
|
||||||
if (ret)
|
if (ret)
|
||||||
@ -537,6 +512,3 @@ error_iio_sw_rb_free:
|
|||||||
iio_sw_rb_free(indio_dev->ring);
|
iio_sw_rb_free(indio_dev->ring);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user