forked from Minki/linux
Blackfin arch: Fix up /proc/cpuinfo so it is like everyone else
Fix up /proc/cpuinfo so it is like everyone else, and gets parsed by various applications properly. Still needs some tweaking on parts without full L1 sram, like 532, 531, so it doesn't print out L1 bank info that doesn't exist. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
This commit is contained in:
Robin Getz
Bryan Wu
parent
4fb4524162
commit
73b0c0b0c1
@ -498,7 +498,7 @@ EXPORT_SYMBOL(get_sclk);
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*/
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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char *cpu, *mmu, *fpu, *name;
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char *cpu, *mmu, *fpu, *name, vendor[20], cache[30];
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uint32_t revid;
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u_long cclk = 0, sclk = 0;
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@ -513,65 +513,78 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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cclk = get_cclk();
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sclk = get_sclk();
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seq_printf(m, "CPU:\t\tADSP-%s Rev. 0.%d\n"
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"MMU:\t\t%s\n"
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"FPU:\t\t%s\n"
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"Core Clock:\t%9lu Hz\n"
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"System Clock:\t%9lu Hz\n"
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"BogoMips:\t%lu.%02lu\n"
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"Calibration:\t%lu loops\n",
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cpu, revid, mmu, fpu,
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cclk,
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sclk,
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switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
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case(0xca):
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strcpy(vendor, "AnalogDevices");
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break;
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default:
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strcpy(vendor, "unknown");
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}
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seq_printf(m, "processor\t: %d\n"
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"vendor_id\t: %s\n"
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"cpu family\t: 0x%x\n"
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"model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK)\n"
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"stepping\t: %d\n",
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0,
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vendor,
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(bfin_read_CHIPID() & CHIPID_FAMILY),
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cpu, cclk/1000000, sclk/1000000,
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revid);
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seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
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cclk/1000000, cclk%1000000,
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sclk/1000000, sclk%1000000);
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seq_printf(m, "bogomips\t: %lu.%02lu\n"
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"Calibration\t: %lu loops\n",
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(loops_per_jiffy * HZ) / 500000,
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((loops_per_jiffy * HZ) / 5000) % 100,
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(loops_per_jiffy * HZ));
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seq_printf(m, "Board Name:\t%s\n", name);
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seq_printf(m, "Board Memory:\t%ld MB\n", physical_mem_end >> 20);
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seq_printf(m, "Kernel Memory:\t%ld MB\n", (unsigned long)_ramend >> 20);
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if (bfin_read_IMEM_CONTROL() & (ENICPLB | IMC))
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seq_printf(m, "I-CACHE:\tON\n");
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else
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seq_printf(m, "I-CACHE:\tOFF\n");
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if ((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE))
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seq_printf(m, "D-CACHE:\tON"
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#if defined CONFIG_BFIN_WB
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" (write-back)"
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#elif defined CONFIG_BFIN_WT
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" (write-through)"
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#endif
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"\n");
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else
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seq_printf(m, "D-CACHE:\tOFF\n");
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/* Check Cache configutation */
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switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
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case ACACHE_BSRAM:
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seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tSRAM\n");
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strcpy(cache, "dbank-A/B\t: cache/sram");
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dcache_size = 16;
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dsup_banks = 1;
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break;
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case ACACHE_BCACHE:
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seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tCACHE\n");
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strcpy(cache, "dbank-A/B\t: cache/cache");
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dcache_size = 32;
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dsup_banks = 2;
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break;
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case ASRAM_BSRAM:
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seq_printf(m, "DBANK-A:\tSRAM\n" "DBANK-B:\tSRAM\n");
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strcpy(cache, "dbank-A/B\t: sram/sram");
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dcache_size = 0;
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dsup_banks = 0;
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break;
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default:
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strcpy(cache, "unknown");
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dcache_size = 0;
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dsup_banks = 0;
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break;
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}
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/* Is it turned on? */
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if (!((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE)))
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dcache_size = 0;
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seq_printf(m, "I-CACHE Size:\t%dKB\n", BFIN_ICACHESIZE / 1024);
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seq_printf(m, "D-CACHE Size:\t%dKB\n", dcache_size);
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seq_printf(m, "I-CACHE Setup:\t%d Sub-banks/%d Ways, %d Lines/Way\n",
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seq_printf(m, "cache size\t: %d KB(L1 icache) "
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"%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
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BFIN_ICACHESIZE / 1024, dcache_size,
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#if defined CONFIG_BFIN_WB
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"wb"
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#elif defined CONFIG_BFIN_WT
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"wt"
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#endif
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, 0);
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seq_printf(m, "%s\n", cache);
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seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
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BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
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seq_printf(m,
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"D-CACHE Setup:\t%d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
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"dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
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dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
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BFIN_DLINES);
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#ifdef CONFIG_BFIN_ICACHE_LOCK
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@ -625,6 +638,15 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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seq_printf(m, "No Ways are locked\n");
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}
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#endif
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seq_printf(m, "board name\t: %s\n", name);
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seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
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physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
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seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
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((int)memory_end - (int)_stext) >> 10,
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_stext,
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(void *)memory_end);
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return 0;
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}
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