drm/i915: Fix modeset handling during gpu reset, v5.
This function would call drm_modeset_lock_all, while the suspend/resume
functions already have their own locking. Fix this by factoring out
__intel_display_resume, and calling the atomic helpers for duplicating
atomic state and disabling all crtc's during suspend.
Changes since v1:
- Deal with -EDEADLK right after lock_all and clean up calls
to hw readout.
- Always take all modeset locks so updates during gpu reset are blocked.
Changes since v2:
- Fix deadlock in intel_update_primary_planes.
- Move WARN_ON(EDEADLK) to __intel_display_resume.
- pctx -> ctx
- only call __intel_display_resume on success in intel_display_resume.
Changes since v3:
- Rebase on top of dev_priv -> dev change.
- Use drm_modeset_lock_all_ctx instead of drm_modeset_lock_all.
Changes since v4 [by vsyrjala]:
- Deal with skip_intermediate_wm
- Update comment w.r.t. mode_config.mutex vs. ->detect()
- Rebase due to INTEL_GEN() etc.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Fixes: e2c8b8701e
("drm/i915: Use atomic helpers for suspend, v2.")
Cc: stable@vger.kernel.org
Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1470428910-12125-2-git-send-email-ville.syrjala@linux.intel.com
This commit is contained in:
parent
a168f5b3f1
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7397489399
@ -1840,6 +1840,7 @@ struct drm_i915_private {
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enum modeset_restore modeset_restore;
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enum modeset_restore modeset_restore;
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struct mutex modeset_restore_lock;
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struct mutex modeset_restore_lock;
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struct drm_atomic_state *modeset_restore_state;
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struct drm_atomic_state *modeset_restore_state;
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struct drm_modeset_acquire_ctx reset_ctx;
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struct list_head vm_list; /* Global list of all address spaces */
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struct list_head vm_list; /* Global list of all address spaces */
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struct i915_ggtt ggtt; /* VM representing the global address space */
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struct i915_ggtt ggtt; /* VM representing the global address space */
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@ -3093,40 +3093,110 @@ static void intel_update_primary_planes(struct drm_device *dev)
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for_each_crtc(dev, crtc) {
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for_each_crtc(dev, crtc) {
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struct intel_plane *plane = to_intel_plane(crtc->primary);
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struct intel_plane *plane = to_intel_plane(crtc->primary);
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struct intel_plane_state *plane_state;
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struct intel_plane_state *plane_state =
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to_intel_plane_state(plane->base.state);
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drm_modeset_lock_crtc(crtc, &plane->base);
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plane_state = to_intel_plane_state(plane->base.state);
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if (plane_state->visible)
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if (plane_state->visible)
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plane->update_plane(&plane->base,
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plane->update_plane(&plane->base,
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to_intel_crtc_state(crtc->state),
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to_intel_crtc_state(crtc->state),
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plane_state);
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plane_state);
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drm_modeset_unlock_crtc(crtc);
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}
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}
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}
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}
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static int
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__intel_display_resume(struct drm_device *dev,
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struct drm_atomic_state *state)
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{
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struct drm_crtc_state *crtc_state;
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struct drm_crtc *crtc;
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int i, ret;
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intel_modeset_setup_hw_state(dev);
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i915_redisable_vga(dev);
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if (!state)
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return 0;
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for_each_crtc_in_state(state, crtc, crtc_state, i) {
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/*
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* Force recalculation even if we restore
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* current state. With fast modeset this may not result
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* in a modeset when the state is compatible.
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*/
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crtc_state->mode_changed = true;
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}
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/* ignore any reset values/BIOS leftovers in the WM registers */
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to_intel_atomic_state(state)->skip_intermediate_wm = true;
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ret = drm_atomic_commit(state);
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WARN_ON(ret == -EDEADLK);
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return ret;
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}
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void intel_prepare_reset(struct drm_i915_private *dev_priv)
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void intel_prepare_reset(struct drm_i915_private *dev_priv)
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{
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{
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struct drm_device *dev = &dev_priv->drm;
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struct drm_modeset_acquire_ctx *ctx = &dev_priv->reset_ctx;
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struct drm_atomic_state *state;
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int ret;
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/* no reset support for gen2 */
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/* no reset support for gen2 */
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if (IS_GEN2(dev_priv))
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if (IS_GEN2(dev_priv))
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return;
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return;
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/* reset doesn't touch the display */
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/*
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* Need mode_config.mutex so that we don't
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* trample ongoing ->detect() and whatnot.
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*/
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mutex_lock(&dev->mode_config.mutex);
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drm_modeset_acquire_init(ctx, 0);
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while (1) {
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ret = drm_modeset_lock_all_ctx(dev, ctx);
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if (ret != -EDEADLK)
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break;
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drm_modeset_backoff(ctx);
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}
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/* reset doesn't touch the display, but flips might get nuked anyway, */
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if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))
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if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))
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return;
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return;
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drm_modeset_lock_all(&dev_priv->drm);
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/*
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/*
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* Disabling the crtcs gracefully seems nicer. Also the
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* Disabling the crtcs gracefully seems nicer. Also the
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* g33 docs say we should at least disable all the planes.
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* g33 docs say we should at least disable all the planes.
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*/
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*/
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intel_display_suspend(&dev_priv->drm);
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state = drm_atomic_helper_duplicate_state(dev, ctx);
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if (IS_ERR(state)) {
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ret = PTR_ERR(state);
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state = NULL;
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DRM_ERROR("Duplicating state failed with %i\n", ret);
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goto err;
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}
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ret = drm_atomic_helper_disable_all(dev, ctx);
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if (ret) {
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DRM_ERROR("Suspending crtc's failed with %i\n", ret);
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goto err;
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}
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dev_priv->modeset_restore_state = state;
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state->acquire_ctx = ctx;
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return;
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err:
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drm_atomic_state_free(state);
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}
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}
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void intel_finish_reset(struct drm_i915_private *dev_priv)
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void intel_finish_reset(struct drm_i915_private *dev_priv)
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{
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{
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struct drm_device *dev = &dev_priv->drm;
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struct drm_modeset_acquire_ctx *ctx = &dev_priv->reset_ctx;
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struct drm_atomic_state *state = dev_priv->modeset_restore_state;
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int ret;
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/*
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/*
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* Flips in the rings will be nuked by the reset,
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* Flips in the rings will be nuked by the reset,
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* so complete all pending flips so that user space
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* so complete all pending flips so that user space
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@ -3138,6 +3208,8 @@ void intel_finish_reset(struct drm_i915_private *dev_priv)
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if (IS_GEN2(dev_priv))
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if (IS_GEN2(dev_priv))
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return;
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return;
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dev_priv->modeset_restore_state = NULL;
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/* reset doesn't touch the display */
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/* reset doesn't touch the display */
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if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)) {
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if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)) {
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/*
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/*
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@ -3149,29 +3221,32 @@ void intel_finish_reset(struct drm_i915_private *dev_priv)
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* FIXME: Atomic will make this obsolete since we won't schedule
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* FIXME: Atomic will make this obsolete since we won't schedule
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* CS-based flips (which might get lost in gpu resets) any more.
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* CS-based flips (which might get lost in gpu resets) any more.
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*/
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*/
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intel_update_primary_planes(&dev_priv->drm);
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intel_update_primary_planes(dev);
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return;
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} else {
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/*
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* The display has been reset as well,
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* so need a full re-initialization.
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*/
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intel_runtime_pm_disable_interrupts(dev_priv);
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intel_runtime_pm_enable_interrupts(dev_priv);
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intel_modeset_init_hw(dev);
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spin_lock_irq(&dev_priv->irq_lock);
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if (dev_priv->display.hpd_irq_setup)
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dev_priv->display.hpd_irq_setup(dev_priv);
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spin_unlock_irq(&dev_priv->irq_lock);
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ret = __intel_display_resume(dev, state);
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if (ret)
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DRM_ERROR("Restoring old state failed with %i\n", ret);
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intel_hpd_init(dev_priv);
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}
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}
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/*
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drm_modeset_drop_locks(ctx);
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* The display has been reset as well,
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drm_modeset_acquire_fini(ctx);
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* so need a full re-initialization.
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mutex_unlock(&dev->mode_config.mutex);
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*/
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intel_runtime_pm_disable_interrupts(dev_priv);
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intel_runtime_pm_enable_interrupts(dev_priv);
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intel_modeset_init_hw(&dev_priv->drm);
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spin_lock_irq(&dev_priv->irq_lock);
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if (dev_priv->display.hpd_irq_setup)
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dev_priv->display.hpd_irq_setup(dev_priv);
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spin_unlock_irq(&dev_priv->irq_lock);
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intel_display_resume(&dev_priv->drm);
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intel_hpd_init(dev_priv);
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drm_modeset_unlock_all(&dev_priv->drm);
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}
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}
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static bool intel_crtc_has_pending_flip(struct drm_crtc *crtc)
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static bool intel_crtc_has_pending_flip(struct drm_crtc *crtc)
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@ -16180,9 +16255,10 @@ void intel_display_resume(struct drm_device *dev)
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struct drm_atomic_state *state = dev_priv->modeset_restore_state;
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struct drm_atomic_state *state = dev_priv->modeset_restore_state;
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struct drm_modeset_acquire_ctx ctx;
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struct drm_modeset_acquire_ctx ctx;
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int ret;
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int ret;
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bool setup = false;
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dev_priv->modeset_restore_state = NULL;
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dev_priv->modeset_restore_state = NULL;
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if (state)
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state->acquire_ctx = &ctx;
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/*
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/*
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* This is a cludge because with real atomic modeset mode_config.mutex
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* This is a cludge because with real atomic modeset mode_config.mutex
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@ -16193,43 +16269,17 @@ void intel_display_resume(struct drm_device *dev)
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mutex_lock(&dev->mode_config.mutex);
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mutex_lock(&dev->mode_config.mutex);
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drm_modeset_acquire_init(&ctx, 0);
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drm_modeset_acquire_init(&ctx, 0);
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retry:
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while (1) {
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ret = drm_modeset_lock_all_ctx(dev, &ctx);
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ret = drm_modeset_lock_all_ctx(dev, &ctx);
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if (ret != -EDEADLK)
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break;
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if (ret == 0 && !setup) {
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setup = true;
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intel_modeset_setup_hw_state(dev);
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i915_redisable_vga(dev);
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}
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if (ret == 0 && state) {
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struct drm_crtc_state *crtc_state;
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struct drm_crtc *crtc;
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int i;
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state->acquire_ctx = &ctx;
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/* ignore any reset values/BIOS leftovers in the WM registers */
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to_intel_atomic_state(state)->skip_intermediate_wm = true;
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for_each_crtc_in_state(state, crtc, crtc_state, i) {
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/*
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* Force recalculation even if we restore
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* current state. With fast modeset this may not result
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* in a modeset when the state is compatible.
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*/
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crtc_state->mode_changed = true;
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}
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ret = drm_atomic_commit(state);
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}
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if (ret == -EDEADLK) {
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drm_modeset_backoff(&ctx);
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drm_modeset_backoff(&ctx);
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goto retry;
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}
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}
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if (!ret)
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ret = __intel_display_resume(dev, state);
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drm_modeset_drop_locks(&ctx);
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drm_modeset_drop_locks(&ctx);
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drm_modeset_acquire_fini(&ctx);
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drm_modeset_acquire_fini(&ctx);
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mutex_unlock(&dev->mode_config.mutex);
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mutex_unlock(&dev->mode_config.mutex);
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