forked from Minki/linux
dmaengine-fix-5.1-rc7
dmaengine fixes for v5.1-rc7 - fix for wrong register use in mediatek driver - fix in sh driver for glitch is tx_status and treating 0 a valid reside for cyclic - fix in bcm driver for using right memory allocation flag -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJcxUSOAAoJEHwUBw8lI4NHRxsQAIXJ5bRc9yWRBAnKtAboJjsD LosSArrM8B8aJSvVB/N+5F7gvpHc4lwq+XIhS+v7SR9PYuyNv1kETccswtIb/Ua1 okEiBYQbKab4yk5wnoejBZFWLu4OXmx0q1+tY9K7zvoXzc+mAuKwpfzGAGeYptCP 9jyMP7l/YfpnoPdySwTmyCKdpBw37fOOC3XIK938RQ5ktCVYJsg9K6YYb6gcnOXW DY0Nq64KmGnQYTU1R7YcQ5gXclCX4OE2bnbIOh6nKHEoDmHnw9DFnCP4m54R6yKk WljgyIViQe4tjljQB/jh6Crs3NE4fAJAdoMQq7ZOkwCOmjdPz3ZvzJjxGM+kZNb8 iWrkbSG9D46Ico7FNpatSQlav6Nmwl+NLrGxEyFu4BWUbIk8fTRu3toGn+LRvjU7 s7aO6nizlFX5Dc0YNswwq7k5NrDguOHrhk5wp1JP8XZ1Q0rhZAKNiCbYMJx+JVd+ zvbcoppLyVCx6KPhiNSr+wSBZDIvblZofz2CiMtYzzhTJBimdAIeY5ruJA2/OeSJ MHDIAGbbukWcdAg5AhT5RpVP1u8gzfJ6bk/K7cGLc4DP41Qh+kH9D335S0352/F3 6mT/KJI4LkjrL643sPmb1bQTNCrhwqKhf7ycuney3Tax+vWhGDOog3QidaYnvsvN dLQ6MCpciQR41cgsoYGt =qu54 -----END PGP SIGNATURE----- Merge tag 'dmaengine-fix-5.1-rc7' of git://git.infradead.org/users/vkoul/slave-dma Pull dmaengine fixes from Vinod Koul: - fix for wrong register use in mediatek driver - fix in sh driver for glitch is tx_status and treating 0 a valid residue for cyclic - fix in bcm driver for using right memory allocation flag * tag 'dmaengine-fix-5.1-rc7' of git://git.infradead.org/users/vkoul/slave-dma: dmaengine: mediatek-cqdma: fix wrong register usage in mtk_cqdma_start dmaengine: sh: rcar-dmac: Fix glitch in dmaengine_tx_status dmaengine: sh: rcar-dmac: With cyclic DMA residue 0 is valid dmaengine: bcm2835: Avoid GFP_KERNEL in device_prep_slave_sg
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commit
72a6e35db3
@ -671,7 +671,7 @@ static struct dma_async_tx_descriptor *bcm2835_dma_prep_slave_sg(
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d = bcm2835_dma_create_cb_chain(chan, direction, false,
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info, extra,
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frames, src, dst, 0, 0,
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GFP_KERNEL);
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GFP_NOWAIT);
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if (!d)
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return NULL;
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@ -253,7 +253,7 @@ static void mtk_cqdma_start(struct mtk_cqdma_pchan *pc,
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#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
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mtk_dma_set(pc, MTK_CQDMA_DST2, cvd->dest >> MTK_CQDMA_ADDR2_SHFIT);
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#else
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mtk_dma_set(pc, MTK_CQDMA_SRC2, 0);
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mtk_dma_set(pc, MTK_CQDMA_DST2, 0);
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#endif
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/* setup the length */
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@ -1282,6 +1282,9 @@ static unsigned int rcar_dmac_chan_get_residue(struct rcar_dmac_chan *chan,
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enum dma_status status;
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unsigned int residue = 0;
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unsigned int dptr = 0;
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unsigned int chcrb;
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unsigned int tcrb;
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unsigned int i;
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if (!desc)
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return 0;
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@ -1329,6 +1332,24 @@ static unsigned int rcar_dmac_chan_get_residue(struct rcar_dmac_chan *chan,
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return 0;
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}
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/*
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* We need to read two registers.
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* Make sure the control register does not skip to next chunk
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* while reading the counter.
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* Trying it 3 times should be enough: Initial read, retry, retry
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* for the paranoid.
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*/
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for (i = 0; i < 3; i++) {
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chcrb = rcar_dmac_chan_read(chan, RCAR_DMACHCRB) &
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RCAR_DMACHCRB_DPTR_MASK;
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tcrb = rcar_dmac_chan_read(chan, RCAR_DMATCRB);
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/* Still the same? */
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if (chcrb == (rcar_dmac_chan_read(chan, RCAR_DMACHCRB) &
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RCAR_DMACHCRB_DPTR_MASK))
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break;
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}
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WARN_ONCE(i >= 3, "residue might be not continuous!");
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/*
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* In descriptor mode the descriptor running pointer is not maintained
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* by the interrupt handler, find the running descriptor from the
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@ -1336,8 +1357,7 @@ static unsigned int rcar_dmac_chan_get_residue(struct rcar_dmac_chan *chan,
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* mode just use the running descriptor pointer.
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*/
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if (desc->hwdescs.use) {
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dptr = (rcar_dmac_chan_read(chan, RCAR_DMACHCRB) &
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RCAR_DMACHCRB_DPTR_MASK) >> RCAR_DMACHCRB_DPTR_SHIFT;
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dptr = chcrb >> RCAR_DMACHCRB_DPTR_SHIFT;
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if (dptr == 0)
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dptr = desc->nchunks;
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dptr--;
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@ -1355,7 +1375,7 @@ static unsigned int rcar_dmac_chan_get_residue(struct rcar_dmac_chan *chan,
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}
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/* Add the residue for the current chunk. */
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residue += rcar_dmac_chan_read(chan, RCAR_DMATCRB) << desc->xfer_shift;
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residue += tcrb << desc->xfer_shift;
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return residue;
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}
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@ -1368,6 +1388,7 @@ static enum dma_status rcar_dmac_tx_status(struct dma_chan *chan,
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enum dma_status status;
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unsigned long flags;
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unsigned int residue;
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bool cyclic;
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status = dma_cookie_status(chan, cookie, txstate);
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if (status == DMA_COMPLETE || !txstate)
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@ -1375,10 +1396,11 @@ static enum dma_status rcar_dmac_tx_status(struct dma_chan *chan,
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spin_lock_irqsave(&rchan->lock, flags);
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residue = rcar_dmac_chan_get_residue(rchan, cookie);
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cyclic = rchan->desc.running ? rchan->desc.running->cyclic : false;
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spin_unlock_irqrestore(&rchan->lock, flags);
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/* if there's no residue, the cookie is complete */
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if (!residue)
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if (!residue && !cyclic)
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return DMA_COMPLETE;
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dma_set_residue(txstate, residue);
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