drm/amdgpu: add amdgpu_set_ib_value helper (v2)
And use it in UVD/VCE command patching. v2: squash in Christian's fix Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1250,11 +1250,19 @@ struct amdgpu_job {
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#define to_amdgpu_job(sched_job) \
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container_of((sched_job), struct amdgpu_job, base)
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static inline u32 amdgpu_get_ib_value(struct amdgpu_cs_parser *p, uint32_t ib_idx, int idx)
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static inline u32 amdgpu_get_ib_value(struct amdgpu_cs_parser *p,
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uint32_t ib_idx, int idx)
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{
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return p->ibs[ib_idx].ptr[idx];
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}
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static inline void amdgpu_set_ib_value(struct amdgpu_cs_parser *p,
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uint32_t ib_idx, int idx,
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uint32_t value)
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{
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p->ibs[ib_idx].ptr[idx] = value;
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}
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/*
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* Writeback
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*/
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@ -616,7 +616,6 @@ static int amdgpu_uvd_cs_pass2(struct amdgpu_uvd_cs_ctx *ctx)
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{
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struct amdgpu_bo_va_mapping *mapping;
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struct amdgpu_bo *bo;
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struct amdgpu_ib *ib;
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uint32_t cmd, lo, hi;
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uint64_t start, end;
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uint64_t addr;
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@ -638,9 +637,10 @@ static int amdgpu_uvd_cs_pass2(struct amdgpu_uvd_cs_ctx *ctx)
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addr -= ((uint64_t)mapping->it.start) * AMDGPU_GPU_PAGE_SIZE;
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start += addr;
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ib = &ctx->parser->ibs[ctx->ib_idx];
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ib->ptr[ctx->data0] = start & 0xFFFFFFFF;
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ib->ptr[ctx->data1] = start >> 32;
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amdgpu_set_ib_value(ctx->parser, ctx->ib_idx, ctx->data0,
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lower_32_bits(start));
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amdgpu_set_ib_value(ctx->parser, ctx->ib_idx, ctx->data1,
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upper_32_bits(start));
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cmd = amdgpu_get_ib_value(ctx->parser, ctx->ib_idx, ctx->idx) >> 1;
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if (cmd < 0x4) {
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@ -519,7 +519,6 @@ static int amdgpu_vce_cs_reloc(struct amdgpu_cs_parser *p, uint32_t ib_idx,
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int lo, int hi, unsigned size, uint32_t index)
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{
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struct amdgpu_bo_va_mapping *mapping;
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struct amdgpu_ib *ib = &p->ibs[ib_idx];
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struct amdgpu_bo *bo;
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uint64_t addr;
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@ -548,8 +547,8 @@ static int amdgpu_vce_cs_reloc(struct amdgpu_cs_parser *p, uint32_t ib_idx,
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addr += amdgpu_bo_gpu_offset(bo);
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addr -= ((uint64_t)size) * ((uint64_t)index);
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ib->ptr[lo] = addr & 0xFFFFFFFF;
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ib->ptr[hi] = addr >> 32;
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amdgpu_set_ib_value(p, ib_idx, lo, lower_32_bits(addr));
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amdgpu_set_ib_value(p, ib_idx, hi, upper_32_bits(addr));
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return 0;
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}
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