forked from Minki/linux
[ARM] 4672/1: pxa: fix DRCMR(n) to support PXA27x and later processors
Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -110,7 +110,10 @@
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#define DALGN __REG(0x400000a0) /* DMA Alignment Register */
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#define DINT __REG(0x400000f0) /* DMA Interrupt Register */
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#define DRCMR(n) __REG2(0x40000100, (n)<<2)
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#define DRCMR(n) (*(((n) < 64) ? \
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&__REG2(0x40000100, ((n) & 0x3f) << 2) : \
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&__REG2(0x40001100, ((n) & 0x3f) << 2)))
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#define DRCMR0 __REG(0x40000100) /* Request to Channel Map Register for DREQ 0 */
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#define DRCMR1 __REG(0x40000104) /* Request to Channel Map Register for DREQ 1 */
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#define DRCMR2 __REG(0x40000108) /* Request to Channel Map Register for I2S receive Request */
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