drm/nouveau/pci: Rename g94 to g92
Signed-off-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -43,7 +43,7 @@ int nv40_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int nv46_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int nv46_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int nv4c_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int nv4c_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int g84_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int g84_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int g94_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int g92_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int gf106_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int gf106_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int gk104_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int gk104_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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@ -1025,7 +1025,7 @@ nv94_chipset = {
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.mc = g84_mc_new,
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.mc = g84_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = nv50_mmu_new,
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.mxm = nv50_mxm_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.pci = g92_pci_new,
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.therm = g84_therm_new,
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.therm = g84_therm_new,
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.timer = nv41_timer_new,
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.timer = nv41_timer_new,
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.volt = nv40_volt_new,
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.volt = nv40_volt_new,
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@ -1057,7 +1057,7 @@ nv96_chipset = {
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.mc = g84_mc_new,
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.mc = g84_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = nv50_mmu_new,
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.mxm = nv50_mxm_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.pci = g92_pci_new,
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.therm = g84_therm_new,
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.therm = g84_therm_new,
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.timer = nv41_timer_new,
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.timer = nv41_timer_new,
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.volt = nv40_volt_new,
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.volt = nv40_volt_new,
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@ -1089,7 +1089,7 @@ nv98_chipset = {
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.mc = g98_mc_new,
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.mc = g98_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = nv50_mmu_new,
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.mxm = nv50_mxm_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.pci = g92_pci_new,
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.therm = g84_therm_new,
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.therm = g84_therm_new,
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.timer = nv41_timer_new,
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.timer = nv41_timer_new,
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.volt = nv40_volt_new,
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.volt = nv40_volt_new,
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@ -1121,7 +1121,7 @@ nva0_chipset = {
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.mc = g84_mc_new,
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.mc = g84_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = nv50_mmu_new,
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.mxm = nv50_mxm_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.pci = g92_pci_new,
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.therm = g84_therm_new,
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.therm = g84_therm_new,
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.timer = nv41_timer_new,
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.timer = nv41_timer_new,
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.volt = nv40_volt_new,
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.volt = nv40_volt_new,
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@ -1153,7 +1153,7 @@ nva3_chipset = {
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.mc = gt215_mc_new,
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.mc = gt215_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = nv50_mmu_new,
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.mxm = nv50_mxm_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.pci = g92_pci_new,
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.pmu = gt215_pmu_new,
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.pmu = gt215_pmu_new,
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.therm = gt215_therm_new,
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.therm = gt215_therm_new,
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.timer = nv41_timer_new,
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.timer = nv41_timer_new,
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@ -1187,7 +1187,7 @@ nva5_chipset = {
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.mc = gt215_mc_new,
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.mc = gt215_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = nv50_mmu_new,
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.mxm = nv50_mxm_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.pci = g92_pci_new,
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.pmu = gt215_pmu_new,
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.pmu = gt215_pmu_new,
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.therm = gt215_therm_new,
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.therm = gt215_therm_new,
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.timer = nv41_timer_new,
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.timer = nv41_timer_new,
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@ -1220,7 +1220,7 @@ nva8_chipset = {
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.mc = gt215_mc_new,
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.mc = gt215_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = nv50_mmu_new,
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.mxm = nv50_mxm_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.pci = g92_pci_new,
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.pmu = gt215_pmu_new,
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.pmu = gt215_pmu_new,
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.therm = gt215_therm_new,
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.therm = gt215_therm_new,
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.timer = nv41_timer_new,
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.timer = nv41_timer_new,
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@ -1253,7 +1253,7 @@ nvaa_chipset = {
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.mc = g98_mc_new,
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.mc = g98_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = nv50_mmu_new,
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.mxm = nv50_mxm_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.pci = g92_pci_new,
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.therm = g84_therm_new,
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.therm = g84_therm_new,
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.timer = nv41_timer_new,
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.timer = nv41_timer_new,
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.volt = nv40_volt_new,
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.volt = nv40_volt_new,
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@ -1285,7 +1285,7 @@ nvac_chipset = {
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.mc = g98_mc_new,
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.mc = g98_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = nv50_mmu_new,
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.mxm = nv50_mxm_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.pci = g92_pci_new,
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.therm = g84_therm_new,
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.therm = g84_therm_new,
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.timer = nv41_timer_new,
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.timer = nv41_timer_new,
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.volt = nv40_volt_new,
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.volt = nv40_volt_new,
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@ -1317,7 +1317,7 @@ nvaf_chipset = {
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.mc = gt215_mc_new,
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.mc = gt215_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = nv50_mmu_new,
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.mxm = nv50_mxm_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.pci = g92_pci_new,
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.pmu = gt215_pmu_new,
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.pmu = gt215_pmu_new,
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.therm = gt215_therm_new,
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.therm = gt215_therm_new,
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.timer = nv41_timer_new,
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.timer = nv41_timer_new,
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@ -6,7 +6,7 @@ nvkm-y += nvkm/subdev/pci/nv40.o
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nvkm-y += nvkm/subdev/pci/nv46.o
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nvkm-y += nvkm/subdev/pci/nv46.o
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nvkm-y += nvkm/subdev/pci/nv4c.o
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nvkm-y += nvkm/subdev/pci/nv4c.o
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nvkm-y += nvkm/subdev/pci/g84.o
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nvkm-y += nvkm/subdev/pci/g84.o
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nvkm-y += nvkm/subdev/pci/g94.o
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nvkm-y += nvkm/subdev/pci/g92.o
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nvkm-y += nvkm/subdev/pci/gf100.o
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nvkm-y += nvkm/subdev/pci/gf100.o
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nvkm-y += nvkm/subdev/pci/gf106.o
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nvkm-y += nvkm/subdev/pci/gf106.o
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nvkm-y += nvkm/subdev/pci/gk104.o
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nvkm-y += nvkm/subdev/pci/gk104.o
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@ -24,7 +24,7 @@
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#include "priv.h"
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#include "priv.h"
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int
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int
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g94_pcie_version_supported(struct nvkm_pci *pci)
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g92_pcie_version_supported(struct nvkm_pci *pci)
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{
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{
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if ((nvkm_pci_rd32(pci, 0x460) & 0x200) == 0x200)
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if ((nvkm_pci_rd32(pci, 0x460) & 0x200) == 0x200)
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return 2;
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return 2;
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@ -32,7 +32,7 @@ g94_pcie_version_supported(struct nvkm_pci *pci)
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}
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}
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static const struct nvkm_pci_func
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static const struct nvkm_pci_func
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g94_pci_func = {
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g92_pci_func = {
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.init = g84_pci_init,
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.init = g84_pci_init,
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.rd32 = nv40_pci_rd32,
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.rd32 = nv40_pci_rd32,
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.wr08 = nv40_pci_wr08,
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.wr08 = nv40_pci_wr08,
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@ -47,11 +47,11 @@ g94_pci_func = {
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.pcie.set_version = g84_pcie_set_version,
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.pcie.set_version = g84_pcie_set_version,
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.pcie.version = g84_pcie_version,
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.pcie.version = g84_pcie_version,
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.pcie.version_supported = g94_pcie_version_supported,
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.pcie.version_supported = g92_pcie_version_supported,
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};
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};
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int
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int
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g94_pci_new(struct nvkm_device *device, int index, struct nvkm_pci **ppci)
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g92_pci_new(struct nvkm_device *device, int index, struct nvkm_pci **ppci)
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{
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{
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return nvkm_pci_new_(&g94_pci_func, device, index, ppci);
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return nvkm_pci_new_(&g92_pci_func, device, index, ppci);
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}
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}
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@ -92,7 +92,7 @@ gf100_pci_func = {
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.pcie.set_version = gf100_pcie_set_version,
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.pcie.set_version = gf100_pcie_set_version,
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.pcie.version = gf100_pcie_version,
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.pcie.version = gf100_pcie_version,
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.pcie.version_supported = g94_pcie_version_supported,
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.pcie.version_supported = g92_pcie_version_supported,
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};
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};
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int
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int
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@ -39,7 +39,7 @@ gf106_pci_func = {
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.pcie.set_version = gf100_pcie_set_version,
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.pcie.set_version = gf100_pcie_set_version,
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.pcie.version = gf100_pcie_version,
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.pcie.version = gf100_pcie_version,
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.pcie.version_supported = g94_pcie_version_supported,
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.pcie.version_supported = g92_pcie_version_supported,
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};
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};
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int
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int
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@ -44,7 +44,7 @@ enum nvkm_pcie_speed g84_pcie_max_speed(struct nvkm_pci *);
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int g84_pcie_init(struct nvkm_pci *);
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int g84_pcie_init(struct nvkm_pci *);
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int g84_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
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int g84_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
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int g94_pcie_version_supported(struct nvkm_pci *);
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int g92_pcie_version_supported(struct nvkm_pci *);
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void gf100_pcie_set_version(struct nvkm_pci *, u8);
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void gf100_pcie_set_version(struct nvkm_pci *, u8);
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int gf100_pcie_version(struct nvkm_pci *);
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int gf100_pcie_version(struct nvkm_pci *);
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