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ARM: OMAP2+: Configure voltage controller for retention

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Similar to existing omap3_vc_set_pmic_signaling(), let's add omap4
specific omap4_vc_set_pmic_signaling(). This allows the configured
devices to enable voltage controller for retention later on during
init.

Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren 2019-10-18 15:09:53 -07:00
parent 821093e1fd
commit 71065d3fe8
2 changed files with 30 additions and 4 deletions
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32
arch/arm/mach-omap2/vc.c
View File

@ -36,15 +36,21 @@
#define OMAP4430_AUTO_CTRL_VDD_CORE(x) ((x) << 0) #define OMAP4430_AUTO_CTRL_VDD_CORE(x) ((x) << 0)
#define OMAP4430_AUTO_CTRL_VDD_RET 2 #define OMAP4430_AUTO_CTRL_VDD_RET 2
#define OMAP4_VDD_DEFAULT_VAL \ #define OMAP4430_VDD_I2C_DISABLE_MASK \
(OMAP4430_VDD_IVA_I2C_DISABLE | \ (OMAP4430_VDD_IVA_I2C_DISABLE | \
OMAP4430_VDD_MPU_I2C_DISABLE | \ OMAP4430_VDD_MPU_I2C_DISABLE | \
OMAP4430_VDD_CORE_I2C_DISABLE | \ OMAP4430_VDD_CORE_I2C_DISABLE)
#define OMAP4_VDD_DEFAULT_VAL \
(OMAP4430_VDD_I2C_DISABLE_MASK | \
OMAP4430_VDD_IVA_PRESENCE | OMAP4430_VDD_MPU_PRESENCE | \ OMAP4430_VDD_IVA_PRESENCE | OMAP4430_VDD_MPU_PRESENCE | \
OMAP4430_AUTO_CTRL_VDD_IVA(OMAP4430_AUTO_CTRL_VDD_RET) | \ OMAP4430_AUTO_CTRL_VDD_IVA(OMAP4430_AUTO_CTRL_VDD_RET) | \
OMAP4430_AUTO_CTRL_VDD_MPU(OMAP4430_AUTO_CTRL_VDD_RET) | \ OMAP4430_AUTO_CTRL_VDD_MPU(OMAP4430_AUTO_CTRL_VDD_RET) | \
OMAP4430_AUTO_CTRL_VDD_CORE(OMAP4430_AUTO_CTRL_VDD_RET)) OMAP4430_AUTO_CTRL_VDD_CORE(OMAP4430_AUTO_CTRL_VDD_RET))
#define OMAP4_VDD_RET_VAL \
(OMAP4_VDD_DEFAULT_VAL & ~OMAP4430_VDD_I2C_DISABLE_MASK)
/** /**
* struct omap_vc_channel_cfg - describe the cfg_channel bitfield * struct omap_vc_channel_cfg - describe the cfg_channel bitfield
* @sa: bit for slave address * @sa: bit for slave address
@ -299,6 +305,26 @@ void omap3_vc_set_pmic_signaling(int core_next_state)
} }
} }
void omap4_vc_set_pmic_signaling(int core_next_state)
{
struct voltagedomain *vd = vc.vd;
u32 val;
if (!vd)
return;
switch (core_next_state) {
case PWRDM_POWER_RET:
val = OMAP4_VDD_RET_VAL;
break;
default:
val = OMAP4_VDD_DEFAULT_VAL;
break;
}
vd->write(val, OMAP4_PRM_VOLTCTRL_OFFSET);
}
/* /*
* Configure signal polarity for sys_clkreq and sys_off_mode pins * Configure signal polarity for sys_clkreq and sys_off_mode pins
* as the default values are wrong and can cause the system to hang * as the default values are wrong and can cause the system to hang

2
arch/arm/mach-omap2/vc.h
View File

@ -117,7 +117,7 @@ extern struct omap_vc_param omap4_iva_vc_data;
extern struct omap_vc_param omap4_core_vc_data; extern struct omap_vc_param omap4_core_vc_data;
void omap3_vc_set_pmic_signaling(int core_next_state); void omap3_vc_set_pmic_signaling(int core_next_state);
void omap4_vc_set_pmic_signaling(int core_next_state);
void omap_vc_init_channel(struct voltagedomain *voltdm); void omap_vc_init_channel(struct voltagedomain *voltdm);
int omap_vc_pre_scale(struct voltagedomain *voltdm, int omap_vc_pre_scale(struct voltagedomain *voltdm,