wil6210: clear PAL_UNIT_ICR part of device reset
When FW starts running it can get D0 to D3 interrupt that is a leftover from previous system suspend while FW was not running. As this interrupt is not relevant anymore, clear it part of device reset procedure. Signed-off-by: Dedy Lansky <qca_dlansky@qca.qualcomm.com> Signed-off-by: Maya Erez <qca_merez@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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@ -943,6 +943,8 @@ static void wil_pre_fw_config(struct wil6210_priv *wil)
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/* it is W1C, clear by writing back same value */
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wil_s(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, ICR), 0);
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wil_w(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, IMV), ~0);
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/* clear PAL_UNIT_ICR (potential D0->D3 leftover) */
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wil_s(wil, RGF_PAL_UNIT_ICR + offsetof(struct RGF_ICR, ICR), 0);
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if (wil->fw_calib_result > 0) {
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__le32 val = cpu_to_le32(wil->fw_calib_result |
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@ -268,6 +268,7 @@ struct RGF_ICR {
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#define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2)
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#define RGF_HP_CTRL (0x88265c)
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#define RGF_PAL_UNIT_ICR (0x88266c) /* struct RGF_ICR */
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#define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4)
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/* MAC timer, usec, for packet lifetime */
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