mfd: lpc_ich: Add support for pinctrl in non-ACPI system
Add support for non-ACPI systems, such as system that uses Advanced Boot Loader (ABL) whereby a platform device has to be created in order to bind with pin control and GPIO. At the moment, Intel Apollo Lake In-Vehicle Infotainment (IVI) system requires a driver to hide and unhide P2SB to lookup P2SB BAR and pass the PCI BAR address to GPIO. Signed-off-by: Tan Jui Nee <jui.nee.tan@intel.com> Co-developed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Henning Schild <henning.schild@siemens.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee@kernel.org>
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@ -8,7 +8,8 @@
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* Configuration Registers.
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*
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* This driver is derived from lpc_sch.
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*
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* Copyright (c) 2017, 2021-2022 Intel Corporation
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* Copyright (c) 2011 Extreme Engineering Solution, Inc.
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* Author: Aaron Sierra <asierra@xes-inc.com>
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*
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@ -42,6 +43,7 @@
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#include <linux/errno.h>
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#include <linux/acpi.h>
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#include <linux/pci.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/lpc_ich.h>
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#include <linux/platform_data/itco_wdt.h>
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@ -142,6 +144,73 @@ static struct mfd_cell lpc_ich_gpio_cell = {
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.ignore_resource_conflicts = true,
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};
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#define APL_GPIO_NORTH 0
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#define APL_GPIO_NORTHWEST 1
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#define APL_GPIO_WEST 2
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#define APL_GPIO_SOUTHWEST 3
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#define APL_GPIO_NR_DEVICES 4
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/* Offset data for Apollo Lake GPIO controllers */
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static resource_size_t apl_gpio_offsets[APL_GPIO_NR_DEVICES] = {
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[APL_GPIO_NORTH] = 0xc50000,
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[APL_GPIO_NORTHWEST] = 0xc40000,
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[APL_GPIO_WEST] = 0xc70000,
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[APL_GPIO_SOUTHWEST] = 0xc00000,
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};
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#define APL_GPIO_RESOURCE_SIZE 0x1000
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#define APL_GPIO_IRQ 14
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static struct resource apl_gpio_resources[APL_GPIO_NR_DEVICES][2] = {
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[APL_GPIO_NORTH] = {
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DEFINE_RES_MEM(0, 0),
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DEFINE_RES_IRQ(APL_GPIO_IRQ),
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},
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[APL_GPIO_NORTHWEST] = {
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DEFINE_RES_MEM(0, 0),
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DEFINE_RES_IRQ(APL_GPIO_IRQ),
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},
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[APL_GPIO_WEST] = {
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DEFINE_RES_MEM(0, 0),
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DEFINE_RES_IRQ(APL_GPIO_IRQ),
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},
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[APL_GPIO_SOUTHWEST] = {
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DEFINE_RES_MEM(0, 0),
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DEFINE_RES_IRQ(APL_GPIO_IRQ),
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},
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};
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static const struct mfd_cell apl_gpio_devices[APL_GPIO_NR_DEVICES] = {
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[APL_GPIO_NORTH] = {
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.name = "apollolake-pinctrl",
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.id = APL_GPIO_NORTH,
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.num_resources = ARRAY_SIZE(apl_gpio_resources[APL_GPIO_NORTH]),
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.resources = apl_gpio_resources[APL_GPIO_NORTH],
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.ignore_resource_conflicts = true,
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},
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[APL_GPIO_NORTHWEST] = {
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.name = "apollolake-pinctrl",
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.id = APL_GPIO_NORTHWEST,
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.num_resources = ARRAY_SIZE(apl_gpio_resources[APL_GPIO_NORTHWEST]),
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.resources = apl_gpio_resources[APL_GPIO_NORTHWEST],
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.ignore_resource_conflicts = true,
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},
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[APL_GPIO_WEST] = {
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.name = "apollolake-pinctrl",
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.id = APL_GPIO_WEST,
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.num_resources = ARRAY_SIZE(apl_gpio_resources[APL_GPIO_WEST]),
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.resources = apl_gpio_resources[APL_GPIO_WEST],
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.ignore_resource_conflicts = true,
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},
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[APL_GPIO_SOUTHWEST] = {
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.name = "apollolake-pinctrl",
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.id = APL_GPIO_SOUTHWEST,
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.num_resources = ARRAY_SIZE(apl_gpio_resources[APL_GPIO_SOUTHWEST]),
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.resources = apl_gpio_resources[APL_GPIO_SOUTHWEST],
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.ignore_resource_conflicts = true,
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},
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};
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static struct mfd_cell lpc_ich_spi_cell = {
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.name = "intel-spi",
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@ -1085,6 +1154,34 @@ wdt_done:
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return ret;
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}
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static int lpc_ich_init_pinctrl(struct pci_dev *dev)
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{
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struct resource base;
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unsigned int i;
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int ret;
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/* Check, if GPIO has been exported as an ACPI device */
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if (acpi_dev_present("INT3452", NULL, -1))
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return -EEXIST;
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ret = p2sb_bar(dev->bus, 0, &base);
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if (ret)
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return ret;
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for (i = 0; i < ARRAY_SIZE(apl_gpio_devices); i++) {
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struct resource *mem = &apl_gpio_resources[i][0];
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resource_size_t offset = apl_gpio_offsets[i];
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/* Fill MEM resource */
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mem->start = base.start + offset;
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mem->end = base.start + offset + APL_GPIO_RESOURCE_SIZE - 1;
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mem->flags = base.flags;
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}
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return mfd_add_devices(&dev->dev, 0, apl_gpio_devices,
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ARRAY_SIZE(apl_gpio_devices), NULL, 0, NULL);
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}
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static bool lpc_ich_byt_set_writeable(void __iomem *base, void *data)
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{
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u32 val;
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@ -1235,6 +1332,12 @@ static int lpc_ich_probe(struct pci_dev *dev,
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cell_added = true;
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}
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if (priv->chipset == LPC_APL) {
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ret = lpc_ich_init_pinctrl(dev);
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if (!ret)
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cell_added = true;
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}
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if (lpc_chipset_info[priv->chipset].spi_type) {
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ret = lpc_ich_init_spi(dev);
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if (!ret)
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