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[ARM] 4304/1: removes the unnecessary bit number from CKENnn_XXXX

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This patch removes the unnecessary bit number from CKENnn_XXXX
definitions for PXA, so that

	CKEN0_PWM0 --> CKEN_PWM0
	CKEN1_PWM1 --> CKEN_PWM1
	...
	CKEN24_CAMERA --> CKEN_CAMERA

The reasons for the change of these defitions are:

1. they do not scale - they are currently valid for pxa2xx, but
definitely not valid for pxa3xx, e.g., pxa3xx has bit 3 for camera
instead of bit 24

2. they are unnecessary - the peripheral name within the definition
has already announced its usage, we don't need those bit numbers
to know which peripheral we are going to enable/disable clock for

3. they are inconvenient - think about this: a driver programmer
for pxa has to remember which bit in the CKEN register to turn
on/off

Another change in the patch is to make the definitions equal to its
clock bit index, so that

   #define CKEN_CAMERA  (24)

instead of

   #define CKEN_CAMERA  (1 << 24)

this change, however, will add a run-time bit shift operation in
pxa_set_cken(), but the benefit of this change is that it scales
when bit index exceeds 32, e.g., pxa3xx has two registers CKENA
and CKENB, totally 64 bit for this, suppose CAMERA clock enabling
bit is CKENB:10, one can simply define CKEN_CAMERA to be (32 + 10)
and so that pxa_set_cken() need minimum change to adapt to that.

Signed-off-by: eric miao <eric.y.miao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Eric Miao 2007-04-05 04:07:20 +01:00 committed by Russell King
parent a79220b763
commit 7053acbd78
18 changed files with 83 additions and 83 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/spi/pxa2xx
View File

@ -62,7 +62,7 @@ static struct resource pxa_spi_nssp_resources[] = {
static struct pxa2xx_spi_master pxa_nssp_master_info = {
.ssp_type = PXA25x_NSSP, /* Type of SSP */
.clock_enable = CKEN9_NSSP, /* NSSP Peripheral clock */
.clock_enable = CKEN_NSSP, /* NSSP Peripheral clock */
.num_chipselect = 1, /* Matches the number of chips attached to NSSP */
.enable_dma = 1, /* Enables NSSP DMA */
};

4
arch/arm/mach-pxa/generic.c
View File

@ -164,9 +164,9 @@ void pxa_set_cken(int clock, int enable)
local_irq_save(flags);
if (enable)
CKEN |= clock;
CKEN |= (1 << clock);
else
CKEN &= ~clock;
CKEN &= ~(1 << clock);
local_irq_restore(flags);
}

4
arch/arm/mach-pxa/lpd270.c
View File

@ -234,7 +234,7 @@ static void lpd270_backlight_power(int on)
{
if (on) {
pxa_gpio_mode(GPIO16_PWM0_MD);
pxa_set_cken(CKEN0_PWM0, 1);
pxa_set_cken(CKEN_PWM0, 1);
PWM_CTRL0 = 0;
PWM_PWDUTY0 = 0x3ff;
PWM_PERVAL0 = 0x3ff;
@ -242,7 +242,7 @@ static void lpd270_backlight_power(int on)
PWM_CTRL0 = 0;
PWM_PWDUTY0 = 0x0;
PWM_PERVAL0 = 0x3FF;
pxa_set_cken(CKEN0_PWM0, 0);
pxa_set_cken(CKEN_PWM0, 0);
}
}

2
arch/arm/mach-pxa/lubbock.c
View File

@ -220,7 +220,7 @@ static struct resource pxa_ssp_resources[] = {
static struct pxa2xx_spi_master pxa_ssp_master_info = {
.ssp_type = PXA25x_SSP,
.clock_enable = CKEN3_SSP,
.clock_enable = CKEN_SSP,
.num_chipselect = 0,
};

4
arch/arm/mach-pxa/mainstone.c
View File

@ -266,7 +266,7 @@ static void mainstone_backlight_power(int on)
{
if (on) {
pxa_gpio_mode(GPIO16_PWM0_MD);
pxa_set_cken(CKEN0_PWM0, 1);
pxa_set_cken(CKEN_PWM0, 1);
PWM_CTRL0 = 0;
PWM_PWDUTY0 = 0x3ff;
PWM_PERVAL0 = 0x3ff;
@ -274,7 +274,7 @@ static void mainstone_backlight_power(int on)
PWM_CTRL0 = 0;
PWM_PWDUTY0 = 0x0;
PWM_PERVAL0 = 0x3FF;
pxa_set_cken(CKEN0_PWM0, 0);
pxa_set_cken(CKEN_PWM0, 0);
}
}

4
arch/arm/mach-pxa/pxa27x.c
View File

@ -140,9 +140,9 @@ void pxa_cpu_pm_enter(suspend_state_t state)
extern void pxa_cpu_resume(void);
if (state == PM_SUSPEND_STANDBY)
CKEN = CKEN22_MEMC | CKEN9_OSTIMER | CKEN16_LCD |CKEN0_PWM0;
CKEN = CKEN_MEMC | CKEN_OSTIMER | CKEN_LCD | CKEN_PWM0;
else
CKEN = CKEN22_MEMC | CKEN9_OSTIMER;
CKEN = CKEN_MEMC | CKEN_OSTIMER;
/* ensure voltage-change sequencer not initiated, which hangs */
PCFR &= ~PCFR_FVC;

12
arch/arm/mach-pxa/ssp.c
View File

@ -52,13 +52,13 @@ struct ssp_info_ {
*/
static const struct ssp_info_ ssp_info[PXA_SSP_PORTS] = {
#if defined (CONFIG_PXA27x)
{IRQ_SSP, CKEN23_SSP1},
{IRQ_SSP2, CKEN3_SSP2},
{IRQ_SSP3, CKEN4_SSP3},
{IRQ_SSP, CKEN_SSP1},
{IRQ_SSP2, CKEN_SSP2},
{IRQ_SSP3, CKEN_SSP3},
#else
{IRQ_SSP, CKEN3_SSP},
{IRQ_NSSP, CKEN9_NSSP},
{IRQ_ASSP, CKEN10_ASSP},
{IRQ_SSP, CKEN_SSP},
{IRQ_NSSP, CKEN_NSSP},
{IRQ_ASSP, CKEN_ASSP},
#endif
};

12
drivers/i2c/busses/i2c-pxa.c
View File

@ -887,14 +887,14 @@ static int i2c_pxa_probe(struct platform_device *dev)
pxa_gpio_mode(GPIO117_I2CSCL_MD);
pxa_gpio_mode(GPIO118_I2CSDA_MD);
#endif
pxa_set_cken(CKEN14_I2C, 1);
pxa_set_cken(CKEN_I2C, 1);
break;
#ifdef CONFIG_PXA27x
case 1:
local_irq_disable();
PCFR |= PCFR_PI2CEN;
local_irq_enable();
pxa_set_cken(CKEN15_PWRI2C, 1);
pxa_set_cken(CKEN_PWRI2C, 1);
#endif
}
@ -935,11 +935,11 @@ eadapt:
ereqirq:
switch (dev->id) {
case 0:
pxa_set_cken(CKEN14_I2C, 0);
pxa_set_cken(CKEN_I2C, 0);
break;
#ifdef CONFIG_PXA27x
case 1:
pxa_set_cken(CKEN15_PWRI2C, 0);
pxa_set_cken(CKEN_PWRI2C, 0);
local_irq_disable();
PCFR &= ~PCFR_PI2CEN;
local_irq_enable();
@ -962,11 +962,11 @@ static int i2c_pxa_remove(struct platform_device *dev)
free_irq(i2c->irq, i2c);
switch (dev->id) {
case 0:
pxa_set_cken(CKEN14_I2C, 0);
pxa_set_cken(CKEN_I2C, 0);
break;
#ifdef CONFIG_PXA27x
case 1:
pxa_set_cken(CKEN15_PWRI2C, 0);
pxa_set_cken(CKEN_PWRI2C, 0);
local_irq_disable();
PCFR &= ~PCFR_PI2CEN;
local_irq_enable();

4
drivers/mmc/pxamci.c
View File

@ -369,14 +369,14 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
if (CLOCKRATE / clk > ios->clock)
clk <<= 1;
host->clkrt = fls(clk) - 1;
pxa_set_cken(CKEN12_MMC, 1);
pxa_set_cken(CKEN_MMC, 1);
/*
* we write clkrt on the next command
*/
} else {
pxamci_stop_clock(host);
pxa_set_cken(CKEN12_MMC, 0);
pxa_set_cken(CKEN_MMC, 0);
}
if (host->power_mode != ios->power_mode) {

12
drivers/net/irda/pxaficp_ir.c
View File

@ -134,7 +134,7 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed)
DCSR(si->rxdma) &= ~DCSR_RUN;
/* disable FICP */
ICCR0 = 0;
pxa_set_cken(CKEN13_FICP, 0);
pxa_set_cken(CKEN_FICP, 0);
/* set board transceiver to SIR mode */
si->pdata->transceiver_mode(si->dev, IR_SIRMODE);
@ -144,7 +144,7 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed)
pxa_gpio_mode(GPIO47_STTXD_MD);
/* enable the STUART clock */
pxa_set_cken(CKEN5_STUART, 1);
pxa_set_cken(CKEN_STUART, 1);
}
/* disable STUART first */
@ -169,7 +169,7 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed)
/* disable STUART */
STIER = 0;
STISR = 0;
pxa_set_cken(CKEN5_STUART, 0);
pxa_set_cken(CKEN_STUART, 0);
/* disable FICP first */
ICCR0 = 0;
@ -182,7 +182,7 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed)
pxa_gpio_mode(GPIO47_ICPTXD_MD);
/* enable the FICP clock */
pxa_set_cken(CKEN13_FICP, 1);
pxa_set_cken(CKEN_FICP, 1);
si->speed = speed;
pxa_irda_fir_dma_rx_start(si);
@ -593,7 +593,7 @@ static void pxa_irda_shutdown(struct pxa_irda *si)
/* disable STUART SIR mode */
STISR = 0;
/* disable the STUART clock */
pxa_set_cken(CKEN5_STUART, 0);
pxa_set_cken(CKEN_STUART, 0);
/* disable DMA */
DCSR(si->txdma) &= ~DCSR_RUN;
@ -601,7 +601,7 @@ static void pxa_irda_shutdown(struct pxa_irda *si)
/* disable FICP */
ICCR0 = 0;
/* disable the FICP clock */
pxa_set_cken(CKEN13_FICP, 0);
pxa_set_cken(CKEN_FICP, 0);
DRCMR17 = 0;
DRCMR18 = 0;

8
drivers/serial/pxa.c
View File

@ -717,7 +717,7 @@ struct uart_ops serial_pxa_pops = {
static struct uart_pxa_port serial_pxa_ports[] = {
{ /* FFUART */
.name = "FFUART",
.cken = CKEN6_FFUART,
.cken = CKEN_FFUART,
.port = {
.type = PORT_PXA,
.iotype = UPIO_MEM,
@ -731,7 +731,7 @@ static struct uart_pxa_port serial_pxa_ports[] = {
},
}, { /* BTUART */
.name = "BTUART",
.cken = CKEN7_BTUART,
.cken = CKEN_BTUART,
.port = {
.type = PORT_PXA,
.iotype = UPIO_MEM,
@ -745,7 +745,7 @@ static struct uart_pxa_port serial_pxa_ports[] = {
},
}, { /* STUART */
.name = "STUART",
.cken = CKEN5_STUART,
.cken = CKEN_STUART,
.port = {
.type = PORT_PXA,
.iotype = UPIO_MEM,
@ -759,7 +759,7 @@ static struct uart_pxa_port serial_pxa_ports[] = {
},
}, { /* HWUART */
.name = "HWUART",
.cken = CKEN4_HWUART,
.cken = CKEN_HWUART,
.port = {
.type = PORT_PXA,
.iotype = UPIO_MEM,

4
drivers/usb/gadget/pxa2xx_udc.c
View File

@ -1497,7 +1497,7 @@ static void udc_disable(struct pxa2xx_udc *dev)
#ifdef CONFIG_ARCH_PXA
/* Disable clock for USB device */
pxa_set_cken(CKEN11_USB, 0);
pxa_set_cken(CKEN_USB, 0);
#endif
ep0_idle (dev);
@ -1543,7 +1543,7 @@ static void udc_enable (struct pxa2xx_udc *dev)
#ifdef CONFIG_ARCH_PXA
/* Enable clock for USB device */
pxa_set_cken(CKEN11_USB, 1);
pxa_set_cken(CKEN_USB, 1);
udelay(5);
#endif

4
drivers/usb/host/ohci-pxa27x.c
View File

@ -80,7 +80,7 @@ static int pxa27x_start_hc(struct device *dev)
inf = dev->platform_data;
pxa_set_cken(CKEN10_USBHOST, 1);
pxa_set_cken(CKEN_USBHOST, 1);
UHCHR |= UHCHR_FHR;
udelay(11);
@ -123,7 +123,7 @@ static void pxa27x_stop_hc(struct device *dev)
UHCCOMS |= 1;
udelay(10);
pxa_set_cken(CKEN10_USBHOST, 0);
pxa_set_cken(CKEN_USBHOST, 0);
}

4
drivers/video/pxafb.c
View File

@ -803,7 +803,7 @@ static void pxafb_enable_controller(struct pxafb_info *fbi)
pr_debug("reg_lccr3 0x%08x\n", (unsigned int) fbi->reg_lccr3);
/* enable LCD controller clock */
pxa_set_cken(CKEN16_LCD, 1);
pxa_set_cken(CKEN_LCD, 1);
/* Sequence from 11.7.10 */
LCCR3 = fbi->reg_lccr3;
@ -840,7 +840,7 @@ static void pxafb_disable_controller(struct pxafb_info *fbi)
remove_wait_queue(&fbi->ctrlr_wait, &wait);
/* disable LCD controller clock */
pxa_set_cken(CKEN16_LCD, 0);
pxa_set_cken(CKEN_LCD, 0);
}
/*

58
include/asm-arm/arch-pxa/pxa-regs.h
View File

@ -1801,35 +1801,35 @@
#define CCCR_M_MASK 0x0060 /* Memory Frequency to Run Mode Frequency Multiplier */
#define CCCR_L_MASK 0x001f /* Crystal Frequency to Memory Frequency Multiplier */
#define CKEN24_CAMERA (1 << 24) /* Camera Interface Clock Enable */
#define CKEN23_SSP1 (1 << 23) /* SSP1 Unit Clock Enable */
#define CKEN22_MEMC (1 << 22) /* Memory Controller Clock Enable */
#define CKEN21_MEMSTK (1 << 21) /* Memory Stick Host Controller */
#define CKEN20_IM (1 << 20) /* Internal Memory Clock Enable */
#define CKEN19_KEYPAD (1 << 19) /* Keypad Interface Clock Enable */
#define CKEN18_USIM (1 << 18) /* USIM Unit Clock Enable */
#define CKEN17_MSL (1 << 17) /* MSL Unit Clock Enable */
#define CKEN16_LCD (1 << 16) /* LCD Unit Clock Enable */
#define CKEN15_PWRI2C (1 << 15) /* PWR I2C Unit Clock Enable */
#define CKEN14_I2C (1 << 14) /* I2C Unit Clock Enable */
#define CKEN13_FICP (1 << 13) /* FICP Unit Clock Enable */
#define CKEN12_MMC (1 << 12) /* MMC Unit Clock Enable */
#define CKEN11_USB (1 << 11) /* USB Unit Clock Enable */
#define CKEN10_ASSP (1 << 10) /* ASSP (SSP3) Clock Enable */
#define CKEN10_USBHOST (1 << 10) /* USB Host Unit Clock Enable */
#define CKEN9_OSTIMER (1 << 9) /* OS Timer Unit Clock Enable */
#define CKEN9_NSSP (1 << 9) /* NSSP (SSP2) Clock Enable */
#define CKEN8_I2S (1 << 8) /* I2S Unit Clock Enable */
#define CKEN7_BTUART (1 << 7) /* BTUART Unit Clock Enable */
#define CKEN6_FFUART (1 << 6) /* FFUART Unit Clock Enable */
#define CKEN5_STUART (1 << 5) /* STUART Unit Clock Enable */
#define CKEN4_HWUART (1 << 4) /* HWUART Unit Clock Enable */
#define CKEN4_SSP3 (1 << 4) /* SSP3 Unit Clock Enable */
#define CKEN3_SSP (1 << 3) /* SSP Unit Clock Enable */
#define CKEN3_SSP2 (1 << 3) /* SSP2 Unit Clock Enable */
#define CKEN2_AC97 (1 << 2) /* AC97 Unit Clock Enable */
#define CKEN1_PWM1 (1 << 1) /* PWM1 Clock Enable */
#define CKEN0_PWM0 (1 << 0) /* PWM0 Clock Enable */
#define CKEN_CAMERA (24) /* Camera Interface Clock Enable */
#define CKEN_SSP1 (23) /* SSP1 Unit Clock Enable */
#define CKEN_MEMC (22) /* Memory Controller Clock Enable */
#define CKEN_MEMSTK (21) /* Memory Stick Host Controller */
#define CKEN_IM (20) /* Internal Memory Clock Enable */
#define CKEN_KEYPAD (19) /* Keypad Interface Clock Enable */
#define CKEN_USIM (18) /* USIM Unit Clock Enable */
#define CKEN_MSL (17) /* MSL Unit Clock Enable */
#define CKEN_LCD (16) /* LCD Unit Clock Enable */
#define CKEN_PWRI2C (15) /* PWR I2C Unit Clock Enable */
#define CKEN_I2C (14) /* I2C Unit Clock Enable */
#define CKEN_FICP (13) /* FICP Unit Clock Enable */
#define CKEN_MMC (12) /* MMC Unit Clock Enable */
#define CKEN_USB (11) /* USB Unit Clock Enable */
#define CKEN_ASSP (10) /* ASSP (SSP3) Clock Enable */
#define CKEN_USBHOST (10) /* USB Host Unit Clock Enable */
#define CKEN_OSTIMER (9) /* OS Timer Unit Clock Enable */
#define CKEN_NSSP (9) /* NSSP (SSP2) Clock Enable */
#define CKEN_I2S (8) /* I2S Unit Clock Enable */
#define CKEN_BTUART (7) /* BTUART Unit Clock Enable */
#define CKEN_FFUART (6) /* FFUART Unit Clock Enable */
#define CKEN_STUART (5) /* STUART Unit Clock Enable */
#define CKEN_HWUART (4) /* HWUART Unit Clock Enable */
#define CKEN_SSP3 (4) /* SSP3 Unit Clock Enable */
#define CKEN_SSP (3) /* SSP Unit Clock Enable */
#define CKEN_SSP2 (3) /* SSP2 Unit Clock Enable */
#define CKEN_AC97 (2) /* AC97 Unit Clock Enable */
#define CKEN_PWM1 (1) /* PWM1 Clock Enable */
#define CKEN_PWM0 (0) /* PWM0 Clock Enable */
#define OSCC_OON (1 << 1) /* 32.768kHz OON (write-once only bit) */
#define OSCC_OOK (1 << 0) /* 32.768kHz OOK (read-only bit) */

12
sound/arm/pxa2xx-ac97.c
View File

@ -260,7 +260,7 @@ static int pxa2xx_ac97_do_suspend(struct snd_card *card, pm_message_t state)
if (platform_ops && platform_ops->suspend)
platform_ops->suspend(platform_ops->priv);
GCR |= GCR_ACLINK_OFF;
pxa_set_cken(CKEN2_AC97, 0);
pxa_set_cken(CKEN_AC97, 0);
return 0;
}
@ -269,7 +269,7 @@ static int pxa2xx_ac97_do_resume(struct snd_card *card)
{
pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
pxa_set_cken(CKEN2_AC97, 1);
pxa_set_cken(CKEN_AC97, 1);
if (platform_ops && platform_ops->resume)
platform_ops->resume(platform_ops->priv);
snd_ac97_resume(pxa2xx_ac97_ac97);
@ -337,7 +337,7 @@ static int __devinit pxa2xx_ac97_probe(struct platform_device *dev)
/* Use GPIO 113 as AC97 Reset on Bulverde */
pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
#endif
pxa_set_cken(CKEN2_AC97, 1);
pxa_set_cken(CKEN_AC97, 1);
ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus);
if (ret)
@ -361,10 +361,10 @@ static int __devinit pxa2xx_ac97_probe(struct platform_device *dev)
err:
if (card)
snd_card_free(card);
if (CKEN & CKEN2_AC97) {
if (CKEN & CKEN_AC97) {
GCR |= GCR_ACLINK_OFF;
free_irq(IRQ_AC97, NULL);
pxa_set_cken(CKEN2_AC97, 0);
pxa_set_cken(CKEN_AC97, 0);
}
return ret;
}
@ -378,7 +378,7 @@ static int __devexit pxa2xx_ac97_remove(struct platform_device *dev)
platform_set_drvdata(dev, NULL);
GCR |= GCR_ACLINK_OFF;
free_irq(IRQ_AC97, NULL);
pxa_set_cken(CKEN2_AC97, 0);
pxa_set_cken(CKEN_AC97, 0);
}
return 0;

12
sound/soc/pxa/pxa2xx-ac97.c
View File

@ -256,7 +256,7 @@ static int pxa2xx_ac97_suspend(struct platform_device *pdev,
struct snd_soc_cpu_dai *dai)
{
GCR |= GCR_ACLINK_OFF;
pxa_set_cken(CKEN2_AC97, 0);
pxa_set_cken(CKEN_AC97, 0);
return 0;
}
@ -271,7 +271,7 @@ static int pxa2xx_ac97_resume(struct platform_device *pdev,
/* Use GPIO 113 as AC97 Reset on Bulverde */
pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
#endif
pxa_set_cken(CKEN2_AC97, 1);
pxa_set_cken(CKEN_AC97, 1);
return 0;
}
@ -296,14 +296,14 @@ static int pxa2xx_ac97_probe(struct platform_device *pdev)
/* Use GPIO 113 as AC97 Reset on Bulverde */
pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
#endif
pxa_set_cken(CKEN2_AC97, 1);
pxa_set_cken(CKEN_AC97, 1);
return 0;
err:
if (CKEN & CKEN2_AC97) {
if (CKEN & CKEN_AC97) {
GCR |= GCR_ACLINK_OFF;
free_irq(IRQ_AC97, NULL);
pxa_set_cken(CKEN2_AC97, 0);
pxa_set_cken(CKEN_AC97, 0);
}
return ret;
}
@ -312,7 +312,7 @@ static void pxa2xx_ac97_remove(struct platform_device *pdev)
{
GCR |= GCR_ACLINK_OFF;
free_irq(IRQ_AC97, NULL);
pxa_set_cken(CKEN2_AC97, 0);
pxa_set_cken(CKEN_AC97, 0);
}
static int pxa2xx_ac97_hw_params(struct snd_pcm_substream *substream,

4
sound/soc/pxa/pxa2xx-i2s.c
View File

@ -149,7 +149,7 @@ static int pxa2xx_i2s_hw_params(struct snd_pcm_substream *substream,
pxa_gpio_mode(gpio_bus[pxa_i2s.master].tx);
pxa_gpio_mode(gpio_bus[pxa_i2s.master].frm);
pxa_gpio_mode(gpio_bus[pxa_i2s.master].clk);
pxa_set_cken(CKEN8_I2S, 1);
pxa_set_cken(CKEN_I2S, 1);
pxa_i2s_wait();
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
@ -234,7 +234,7 @@ static void pxa2xx_i2s_shutdown(struct snd_pcm_substream *substream)
if (SACR1 & (SACR1_DREC | SACR1_DRPL)) {
SACR0 &= ~SACR0_ENB;
pxa_i2s_wait();
pxa_set_cken(CKEN8_I2S, 0);
pxa_set_cken(CKEN_I2S, 0);
}
}