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drm/i915: add ICP support to cnp_rawclk() and kill icp_rawclk()

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I think I'm probably the one who argued in favor of having separate
implementations for both PCHs, but the calculations are actually the
same, the clocks are the same and the only difference is that on ICP
we write the numerator to the register.

I have previously suggested to kill cnp_rawclk() and keep the
icp_rawclk() style, but Ville gave some good arguments that what's in
this patch may be the better choice.

v2: Switch numerator to 1 from 1000 and adjust calculations
    accordingly (Ville).

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181112232313.26373-3-paulo.r.zanoni@intel.com
This commit is contained in:
Paulo Zanoni 2018-11-12 15:23:13 -08:00
parent 228a5cf381
commit 704e504bd6
1 changed files with 8 additions and 29 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

37
drivers/gpu/drm/i915/intel_cdclk.c
View File

@ -2661,38 +2661,19 @@ static int cnp_rawclk(struct drm_i915_private *dev_priv)
}
rawclk = CNP_RAWCLK_DIV(divider / 1000);
if (fraction)
rawclk |= CNP_RAWCLK_DEN(DIV_ROUND_CLOSEST(1000,
if (fraction) {
int numerator = 1;
rawclk |= CNP_RAWCLK_DEN(DIV_ROUND_CLOSEST(numerator * 1000,
fraction) - 1);
if (HAS_PCH_ICP(dev_priv))
rawclk |= ICP_RAWCLK_NUM(numerator);
}
I915_WRITE(PCH_RAWCLK_FREQ, rawclk);
return divider + fraction;
}
static int icp_rawclk(struct drm_i915_private *dev_priv)
{
u32 rawclk;
int divider, numerator, denominator, frequency;
if (I915_READ(SFUSE_STRAP) & SFUSE_STRAP_RAW_FREQUENCY) {
frequency = 24000;
divider = 24;
numerator = 0;
denominator = 0;
} else {
frequency = 19200;
divider = 19;
numerator = 1;
denominator = 4;
}
rawclk = CNP_RAWCLK_DIV(divider) | ICP_RAWCLK_NUM(numerator) |
CNP_RAWCLK_DEN(denominator);
I915_WRITE(PCH_RAWCLK_FREQ, rawclk);
return frequency;
}
static int pch_rawclk(struct drm_i915_private *dev_priv)
{
return (I915_READ(PCH_RAWCLK_FREQ) & RAWCLK_FREQ_MASK) * 1000;
@ -2740,9 +2721,7 @@ static int g4x_hrawclk(struct drm_i915_private *dev_priv)
*/
void intel_update_rawclk(struct drm_i915_private *dev_priv)
{
if (HAS_PCH_ICP(dev_priv))
dev_priv->rawclk_freq = icp_rawclk(dev_priv);
else if (HAS_PCH_CNP(dev_priv))
if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv))
dev_priv->rawclk_freq = cnp_rawclk(dev_priv);
else if (HAS_PCH_SPLIT(dev_priv))
dev_priv->rawclk_freq = pch_rawclk(dev_priv);