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MIPS: bmips: Add support PCIe controller device nodes

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For Broadcom STB PCIe HW. The 7425 and 7435 are MIPs-based SOCs.  Not much
difference between the two for the DT properties except that they have
slightly different PCIe interrupt assignments.

Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Jim Quinlan 2021-12-09 15:47:23 -05:00 committed by Thomas Bogendoerfer
parent 145790e55d
commit 6fffb01e3b
4 changed files with 78 additions and 0 deletions
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30
arch/mips/boot/dts/brcm/bcm7425.dtsi
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@ -584,4 +584,34 @@
};
};
};
pcie_0: pcie@8b20000 {
status = "disabled";
compatible = "brcm,bcm7425-pcie";
ranges = <0x02000000 0x0 0xd0000000 0xd0000000 0x0 0x08000000
0x02000000 0x0 0xd8000000 0xd8000000 0x0 0x08000000
0x02000000 0x0 0xe0000000 0xe0000000 0x0 0x08000000
0x02000000 0x0 0xe8000000 0xe8000000 0x0 0x08000000>;
reg = <0x10410000 0x19310>;
aspm-no-l0s;
device_type = "pci";
msi-controller;
msi-parent = <&pcie_0>;
#address-cells = <0x3>;
#size-cells = <0x2>;
bus-range = <0x0 0xff>;
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
linux,pci-domain = <0x0>;
interrupt-parent = <&periph_intc>;
interrupts = <37>, <37>;
interrupt-names = "pcie", "msi";
#interrupt-cells = <0x1>;
interrupt-map = <0 0 0 1 &periph_intc 0x21
0 0 0 1 &periph_intc 0x22
0 0 0 1 &periph_intc 0x23
0 0 0 1 &periph_intc 0x24>;
};
};

30
arch/mips/boot/dts/brcm/bcm7435.dtsi
View File

@ -599,4 +599,34 @@
};
};
};
pcie_0: pcie@8b20000 {
status = "disabled";
compatible = "brcm,bcm7435-pcie";
ranges = <0x02000000 0x0 0xd0000000 0xd0000000 0x0 0x08000000
0x02000000 0x0 0xd8000000 0xd8000000 0x0 0x08000000
0x02000000 0x0 0xe0000000 0xe0000000 0x0 0x08000000
0x02000000 0x0 0xe8000000 0xe8000000 0x0 0x08000000>;
reg = <0x10410000 0x19310>;
aspm-no-l0s;
device_type = "pci";
msi-controller;
msi-parent = <&pcie_0>;
#address-cells = <0x3>;
#size-cells = <0x2>;
bus-range = <0x0 0xff>;
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
linux,pci-domain = <0x0>;
interrupt-parent = <&periph_intc>;
interrupts = <39>, <39>;
interrupt-names = "pcie", "msi";
#interrupt-cells = <0x1>;
interrupt-map = <0 0 0 1 &periph_intc 0x23
0 0 0 1 &periph_intc 0x24
0 0 0 1 &periph_intc 0x25
0 0 0 1 &periph_intc 0x26>;
};
};

9
arch/mips/boot/dts/brcm/bcm97425svmb.dts
View File

@ -152,3 +152,12 @@
&waketimer {
status = "okay";
};
&pcie_0 {
status = "okay";
/* 1GB Memc0, 1GB Memc1 */
brcm,scb-sizes = <0 0x40000000 0 0x40000000>;
dma-ranges = <0x43000000 0x00000000 0x00000000 0x00000000 0x0 0x10000000
0x43000000 0x00000000 0x10000000 0x20000000 0x0 0x30000000
0x43000000 0x00000000 0x40000000 0x90000000 0x0 0x40000000>;
};

9
arch/mips/boot/dts/brcm/bcm97435svmb.dts
View File

@ -128,3 +128,12 @@
&waketimer {
status = "okay";
};
&pcie_0 {
status = "okay";
/* 1GB Memc0, 1GB Memc1 */
brcm,scb-sizes = <0 0x40000000 0 0x40000000>;
dma-ranges = <0x43000000 0x00000000 0x00000000 0x00000000 0x0 0x10000000
0x43000000 0x00000000 0x10000000 0x20000000 0x0 0x30000000
0x43000000 0x00000000 0x40000000 0x90000000 0x0 0x40000000>;
};