drm/i915/dp: Fix eDP max rate for display 11+
intel_dp_set_source_rates() calls intel_dp_is_edp(), which is unsafe to use before intel_encoder->type is set. This causes incorrect max source rate to be used for display 11+. On EHL and JSL, HBR3 is used instead of HBR2, and on the other affected platforms, HBR2 is used instead of HBR3. Move intel_dp_set_source_rates() to after intel_encoder->type is set. Add comment to intel_dp_is_edp() describing unsafe usages. Cleanup intel_dp_init_connector() while at it. Note: The same change was originally added as commit680c45c767
("drm/i915/dp: Correctly advertise HBR3 for GEN11+"), but later reverted due to issues in CI in commitd391301960
("Revert "drm/i915/dp: Correctly advertise HBR3 for GEN11+""). Cc: Uma Shankar <uma.shankar@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210901160402.24816-2-animesh.manna@intel.com
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@ -102,6 +102,8 @@ static const u8 valid_dsc_slicecount[] = {1, 2, 4};
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*
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* If a CPU or PCH DP output is attached to an eDP panel, this function
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* will return true, and false otherwise.
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*
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* This function is not safe to use prior to encoder type being set.
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*/
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bool intel_dp_is_edp(struct intel_dp *intel_dp)
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{
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@ -4899,8 +4901,6 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
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intel_encoder->base.name))
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return false;
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intel_dp_set_source_rates(intel_dp);
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intel_dp->reset_link_params = true;
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intel_dp->pps.pps_pipe = INVALID_PIPE;
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intel_dp->pps.active_pipe = INVALID_PIPE;
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@ -4916,28 +4916,22 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
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*/
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drm_WARN_ON(dev, intel_phy_is_tc(dev_priv, phy));
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type = DRM_MODE_CONNECTOR_eDP;
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intel_encoder->type = INTEL_OUTPUT_EDP;
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/* eDP only on port B and/or C on vlv/chv */
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if (drm_WARN_ON(dev, (IS_VALLEYVIEW(dev_priv) ||
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IS_CHERRYVIEW(dev_priv)) &&
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port != PORT_B && port != PORT_C))
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return false;
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} else {
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type = DRM_MODE_CONNECTOR_DisplayPort;
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}
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intel_dp_set_source_rates(intel_dp);
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if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
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intel_dp->pps.active_pipe = vlv_active_pipe(intel_dp);
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/*
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* For eDP we always set the encoder type to INTEL_OUTPUT_EDP, but
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* for DP the encoder type can be set by the caller to
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* INTEL_OUTPUT_UNKNOWN for DDI, so don't rewrite it.
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*/
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if (type == DRM_MODE_CONNECTOR_eDP)
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intel_encoder->type = INTEL_OUTPUT_EDP;
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/* eDP only on port B and/or C on vlv/chv */
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if (drm_WARN_ON(dev, (IS_VALLEYVIEW(dev_priv) ||
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IS_CHERRYVIEW(dev_priv)) &&
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intel_dp_is_edp(intel_dp) &&
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port != PORT_B && port != PORT_C))
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return false;
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drm_dbg_kms(&dev_priv->drm,
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"Adding %s connector on [ENCODER:%d:%s]\n",
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type == DRM_MODE_CONNECTOR_eDP ? "eDP" : "DP",
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