forked from Minki/linux
drm/amd/display: fix surface update sequence
An earlier change added update of interdependent dlg/ttu params for pipes not being updated in the current call. The code fails to check if the other pipes are actually active yet causing an assert. This change adds a check for surface presence on the pipes before updating the interdepenednt params. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2357,7 +2357,8 @@ static void dcn10_apply_ctx_for_surface(
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struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
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/* Skip inactive pipes and ones already updated */
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if (!pipe_ctx->stream || pipe_ctx->stream == stream)
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if (!pipe_ctx->stream || pipe_ctx->stream == stream
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|| !pipe_ctx->plane_state)
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continue;
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pipe_ctx->stream_res.tg->funcs->lock(pipe_ctx->stream_res.tg);
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@ -2371,7 +2372,8 @@ static void dcn10_apply_ctx_for_surface(
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for (i = 0; i < dc->res_pool->pipe_count; i++) {
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struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
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if (!pipe_ctx->stream || pipe_ctx->stream == stream)
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if (!pipe_ctx->stream || pipe_ctx->stream == stream
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|| !pipe_ctx->plane_state)
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continue;
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dcn10_pipe_control_lock(dc, pipe_ctx, false);
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