clk: tegra: Update kerneldoc to match prototypes

For some DFLL functions, the kerneldoc comments don't match the function
prototype. Fix them up to avoid some warnings at build time.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2022-05-06 10:56:00 +02:00
parent 6a7ace2b99
commit 6f6baf690c

View File

@ -667,7 +667,7 @@ static int dfll_force_output(struct tegra_dfll *td, unsigned int out_sel)
}
/**
* dfll_load_lut - load the voltage lookup table
* dfll_load_i2c_lut - load the voltage lookup table
* @td: struct tegra_dfll *
*
* Load the voltage-to-PMIC register value lookup table into the DFLL
@ -898,7 +898,7 @@ static void dfll_set_frequency_request(struct tegra_dfll *td,
}
/**
* tegra_dfll_request_rate - set the next rate for the DFLL to tune to
* dfll_request_rate - set the next rate for the DFLL to tune to
* @td: DFLL instance
* @rate: clock rate to target
*
@ -1006,7 +1006,7 @@ static void dfll_set_open_loop_config(struct tegra_dfll *td)
}
/**
* tegra_dfll_lock - switch from open-loop to closed-loop mode
* dfll_lock - switch from open-loop to closed-loop mode
* @td: DFLL instance
*
* Switch from OPEN_LOOP state to CLOSED_LOOP state. Returns 0 upon success,
@ -1047,7 +1047,7 @@ static int dfll_lock(struct tegra_dfll *td)
}
/**
* tegra_dfll_unlock - switch from closed-loop to open-loop mode
* dfll_unlock - switch from closed-loop to open-loop mode
* @td: DFLL instance
*
* Switch from CLOSED_LOOP state to OPEN_LOOP state. Returns 0 upon success,