bnx2x: Keep only one HW path active
Disable bmac access while working with emac and keep the single lane SerDes in reset while working with 4 lanes XGXS Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -397,7 +397,8 @@ static u8 bnx2x_emac_enable(struct link_params *params,
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/* enable access for bmac registers */
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/* enable access for bmac registers */
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REG_WR(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4, 0x1);
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REG_WR(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4, 0x1);
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}
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} else
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REG_WR(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4, 0x0);
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vars->mac_type = MAC_TYPE_EMAC;
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vars->mac_type = MAC_TYPE_EMAC;
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return 0;
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return 0;
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@ -1021,8 +1022,8 @@ static u8 bnx2x_reset_unicore(struct link_params *params)
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MDIO_COMBO_IEEE0_MII_CONTROL,
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MDIO_COMBO_IEEE0_MII_CONTROL,
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(mii_control |
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(mii_control |
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MDIO_COMBO_IEEO_MII_CONTROL_RESET));
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MDIO_COMBO_IEEO_MII_CONTROL_RESET));
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if (params->switch_cfg == SWITCH_CFG_1G)
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bnx2x_set_serdes_access(params);
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bnx2x_set_serdes_access(params);
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/* wait for the reset to self clear */
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/* wait for the reset to self clear */
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for (i = 0; i < MDIO_ACCESS_TIMEOUT; i++) {
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for (i = 0; i < MDIO_ACCESS_TIMEOUT; i++) {
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