forked from Minki/linux
ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees
Bananapi released an updated revision of the H3/H5 based Bananapi M2+. Version 1.2 enables voltage control for the CPU's regulator by using a GPIO line to toggle a MOSFET that can change the effective resistance value in the regulator's feedback network. This patch adds a common .dtsi file for this new revision, which includes the original common sunxi-bananapi-m2-plus.dtsi file, and adds the GPIO-controlled regulator and a cpu-supply reference. H3 and H5 variant dts files are added as well. Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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@ -1033,6 +1033,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
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sun8i-h2-plus-orangepi-r1.dtb \
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sun8i-h2-plus-orangepi-zero.dtb \
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sun8i-h3-bananapi-m2-plus.dtb \
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sun8i-h3-bananapi-m2-plus-v1.2.dtb \
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sun8i-h3-beelink-x2.dtb \
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sun8i-h3-libretech-all-h3-cc.dtb \
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sun8i-h3-nanopi-m1.dtb \
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13
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus-v1.2.dts
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arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus-v1.2.dts
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@ -0,0 +1,13 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
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*/
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/dts-v1/;
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#include "sun8i-h3.dtsi"
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#include "sunxi-bananapi-m2-plus-v1.2.dtsi"
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/ {
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model = "Banana Pi BPI-M2-Plus v1.2 H3";
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compatible = "bananapi,bpi-m2-plus-v1.2", "allwinner,sun8i-h3";
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};
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arch/arm/boot/dts/sunxi-bananapi-m2-plus-v1.2.dtsi
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arch/arm/boot/dts/sunxi-bananapi-m2-plus-v1.2.dtsi
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@ -0,0 +1,31 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
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*/
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#include "sunxi-bananapi-m2-plus.dtsi"
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/ {
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/*
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* Bananapi M2+ v1.2 uses a GPIO line to change the effective
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* resistance on the CPU regulator's feedback pin.
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*/
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reg_vdd_cpux: vdd-cpux {
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compatible = "regulator-gpio";
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regulator-name = "vdd-cpux";
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regulator-type = "voltage";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1300000>;
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regulator-ramp-delay = <50>; /* 4ms */
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gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
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gpios-states = <0x1>;
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states = <1100000 0x0
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1300000 0x1>;
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};
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};
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&cpu0 {
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cpu-supply = <®_vdd_cpux>;
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};
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@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus-v1.2.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-cc.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
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@ -0,0 +1,11 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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// Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
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/dts-v1/;
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#include "sun50i-h5.dtsi"
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#include <arm/sunxi-bananapi-m2-plus-v1.2.dtsi>
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/ {
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model = "Banana Pi BPI-M2-Plus v1.2 H5";
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compatible = "bananapi,bpi-m2-plus-v1.2", "allwinner,sun50i-h5";
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};
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