forked from Minki/linux
clk: mediatek: mux: Drop unused clock ops
Three out of the four defined clock ops are unused. Drop them. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20210125170819.26130-2-laurent.pinchart@ideasonboard.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -17,23 +17,6 @@ static inline struct mtk_clk_mux *to_mtk_clk_mux(struct clk_hw *hw)
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return container_of(hw, struct mtk_clk_mux, hw);
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}
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static int mtk_clk_mux_enable(struct clk_hw *hw)
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{
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struct mtk_clk_mux *mux = to_mtk_clk_mux(hw);
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u32 mask = BIT(mux->data->gate_shift);
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return regmap_update_bits(mux->regmap, mux->data->mux_ofs,
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mask, ~mask);
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}
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static void mtk_clk_mux_disable(struct clk_hw *hw)
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{
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struct mtk_clk_mux *mux = to_mtk_clk_mux(hw);
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u32 mask = BIT(mux->data->gate_shift);
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regmap_update_bits(mux->regmap, mux->data->mux_ofs, mask, mask);
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}
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static int mtk_clk_mux_enable_setclr(struct clk_hw *hw)
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{
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struct mtk_clk_mux *mux = to_mtk_clk_mux(hw);
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@ -72,28 +55,6 @@ static u8 mtk_clk_mux_get_parent(struct clk_hw *hw)
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return val;
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}
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static int mtk_clk_mux_set_parent_lock(struct clk_hw *hw, u8 index)
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{
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struct mtk_clk_mux *mux = to_mtk_clk_mux(hw);
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u32 mask = GENMASK(mux->data->mux_width - 1, 0);
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unsigned long flags = 0;
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if (mux->lock)
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spin_lock_irqsave(mux->lock, flags);
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else
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__acquire(mux->lock);
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regmap_update_bits(mux->regmap, mux->data->mux_ofs, mask,
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index << mux->data->mux_shift);
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if (mux->lock)
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spin_unlock_irqrestore(mux->lock, flags);
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else
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__release(mux->lock);
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return 0;
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}
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static int mtk_clk_mux_set_parent_setclr_lock(struct clk_hw *hw, u8 index)
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{
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struct mtk_clk_mux *mux = to_mtk_clk_mux(hw);
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@ -129,25 +90,7 @@ static int mtk_clk_mux_set_parent_setclr_lock(struct clk_hw *hw, u8 index)
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return 0;
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}
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const struct clk_ops mtk_mux_ops = {
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.get_parent = mtk_clk_mux_get_parent,
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.set_parent = mtk_clk_mux_set_parent_lock,
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};
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const struct clk_ops mtk_mux_clr_set_upd_ops = {
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.get_parent = mtk_clk_mux_get_parent,
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.set_parent = mtk_clk_mux_set_parent_setclr_lock,
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};
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const struct clk_ops mtk_mux_gate_ops = {
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.enable = mtk_clk_mux_enable,
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.disable = mtk_clk_mux_disable,
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.is_enabled = mtk_clk_mux_is_enabled,
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.get_parent = mtk_clk_mux_get_parent,
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.set_parent = mtk_clk_mux_set_parent_lock,
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};
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const struct clk_ops mtk_mux_gate_clr_set_upd_ops = {
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static const struct clk_ops mtk_mux_ops = {
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.enable = mtk_clk_mux_enable_setclr,
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.disable = mtk_clk_mux_disable_setclr,
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.is_enabled = mtk_clk_mux_is_enabled,
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@ -171,7 +114,7 @@ static struct clk *mtk_clk_register_mux(const struct mtk_mux *mux,
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init.flags = mux->flags | CLK_SET_RATE_PARENT;
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init.parent_names = mux->parent_names;
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init.num_parents = mux->num_parents;
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init.ops = mux->ops;
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init.ops = &mtk_mux_ops;
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clk_mux->regmap = regmap;
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clk_mux->data = mux;
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@ -32,19 +32,12 @@ struct mtk_mux {
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u8 gate_shift;
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s8 upd_shift;
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const struct clk_ops *ops;
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signed char num_parents;
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};
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extern const struct clk_ops mtk_mux_ops;
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extern const struct clk_ops mtk_mux_clr_set_upd_ops;
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extern const struct clk_ops mtk_mux_gate_ops;
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extern const struct clk_ops mtk_mux_gate_clr_set_upd_ops;
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#define GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \
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_mux_set_ofs, _mux_clr_ofs, _shift, _width, \
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_gate, _upd_ofs, _upd, _flags, _ops) { \
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_gate, _upd_ofs, _upd, _flags) { \
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.id = _id, \
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.name = _name, \
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.mux_ofs = _mux_ofs, \
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@ -58,7 +51,6 @@ extern const struct clk_ops mtk_mux_gate_clr_set_upd_ops;
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.parent_names = _parents, \
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.num_parents = ARRAY_SIZE(_parents), \
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.flags = _flags, \
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.ops = &_ops, \
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}
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#define MUX_GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \
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@ -66,8 +58,7 @@ extern const struct clk_ops mtk_mux_gate_clr_set_upd_ops;
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_gate, _upd_ofs, _upd, _flags) \
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GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \
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_mux_set_ofs, _mux_clr_ofs, _shift, _width, \
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_gate, _upd_ofs, _upd, _flags, \
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mtk_mux_gate_clr_set_upd_ops)
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_gate, _upd_ofs, _upd, _flags) \
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#define MUX_GATE_CLR_SET_UPD(_id, _name, _parents, _mux_ofs, \
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_mux_set_ofs, _mux_clr_ofs, _shift, _width, \
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