drm/amdkfd: Contain MMHUB number in mmhub_v9_4_setup_vm_pt_regs()
Adjust the exposed function prototype so that the caller does not need to know the MMHUB number. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -40,7 +40,7 @@
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#include "soc15d.h"
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#include "soc15d.h"
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#include "mmhub_v1_0.h"
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#include "mmhub_v1_0.h"
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#include "gfxhub_v1_0.h"
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#include "gfxhub_v1_0.h"
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#include "gmc_v9_0.h"
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#include "mmhub_v9_4.h"
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enum hqd_dequeue_request_type {
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enum hqd_dequeue_request_type {
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@ -774,9 +774,7 @@ void kgd_gfx_v9_set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmi
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* on GFX8 and older.
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* on GFX8 and older.
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*/
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*/
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if (adev->asic_type == CHIP_ARCTURUS) {
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if (adev->asic_type == CHIP_ARCTURUS) {
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/* Two MMHUBs */
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mmhub_v9_4_setup_vm_pt_regs(adev, vmid, page_table_base);
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mmhub_v9_4_setup_vm_pt_regs(adev, 0, vmid, page_table_base);
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mmhub_v9_4_setup_vm_pt_regs(adev, 1, vmid, page_table_base);
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} else
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} else
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mmhub_v1_0_setup_vm_pt_regs(adev, vmid, page_table_base);
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mmhub_v1_0_setup_vm_pt_regs(adev, vmid, page_table_base);
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@ -36,12 +36,4 @@
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extern const struct amd_ip_funcs gmc_v9_0_ip_funcs;
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extern const struct amd_ip_funcs gmc_v9_0_ip_funcs;
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extern const struct amdgpu_ip_block_version gmc_v9_0_ip_block;
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extern const struct amdgpu_ip_block_version gmc_v9_0_ip_block;
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/* amdgpu_amdkfd*.c */
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void gfxhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
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uint64_t value);
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void mmhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
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uint64_t value);
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void mmhub_v9_4_setup_vm_pt_regs(struct amdgpu_device *adev, int hubid,
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uint32_t vmid, uint64_t value);
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#endif
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#endif
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@ -54,7 +54,7 @@ u64 mmhub_v9_4_get_fb_location(struct amdgpu_device *adev)
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return base;
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return base;
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}
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}
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void mmhub_v9_4_setup_vm_pt_regs(struct amdgpu_device *adev, int hubid,
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static void mmhub_v9_4_setup_hubid_vm_pt_regs(struct amdgpu_device *adev, int hubid,
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uint32_t vmid, uint64_t value)
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uint32_t vmid, uint64_t value)
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{
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{
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/* two registers distance between mmVML2VC0_VM_CONTEXT0_* to
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/* two registers distance between mmVML2VC0_VM_CONTEXT0_* to
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@ -80,7 +80,7 @@ static void mmhub_v9_4_init_gart_aperture_regs(struct amdgpu_device *adev,
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{
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{
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uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
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uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
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mmhub_v9_4_setup_vm_pt_regs(adev, hubid, 0, pt_base);
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mmhub_v9_4_setup_hubid_vm_pt_regs(adev, hubid, 0, pt_base);
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WREG32_SOC15_OFFSET(MMHUB, 0,
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WREG32_SOC15_OFFSET(MMHUB, 0,
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mmVML2VC0_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,
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mmVML2VC0_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,
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@ -101,6 +101,16 @@ static void mmhub_v9_4_init_gart_aperture_regs(struct amdgpu_device *adev,
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(u32)(adev->gmc.gart_end >> 44));
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(u32)(adev->gmc.gart_end >> 44));
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}
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}
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void mmhub_v9_4_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
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uint64_t page_table_base)
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{
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int i;
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for (i = 0; i < MMHUB_NUM_INSTANCES; i++)
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mmhub_v9_4_setup_hubid_vm_pt_regs(adev, i, vmid,
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page_table_base);
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}
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static void mmhub_v9_4_init_system_aperture_regs(struct amdgpu_device *adev,
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static void mmhub_v9_4_init_system_aperture_regs(struct amdgpu_device *adev,
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int hubid)
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int hubid)
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{
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{
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@ -34,5 +34,7 @@ void mmhub_v9_4_init(struct amdgpu_device *adev);
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int mmhub_v9_4_set_clockgating(struct amdgpu_device *adev,
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int mmhub_v9_4_set_clockgating(struct amdgpu_device *adev,
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enum amd_clockgating_state state);
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enum amd_clockgating_state state);
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void mmhub_v9_4_get_clockgating(struct amdgpu_device *adev, u32 *flags);
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void mmhub_v9_4_get_clockgating(struct amdgpu_device *adev, u32 *flags);
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void mmhub_v9_4_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
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uint64_t page_table_base);
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#endif
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#endif
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