forked from Minki/linux
pinctrl: mvebu: dove: use global register regmap
Now that we have a regmap for global registers, get rid of the last remaining hardcoded physical addresses. While at it, also remove DOVE_ prefix from those macros. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Sebastian Hesselbarth
parent
18e6f28e9c
commit
6da67cab4b
@ -30,21 +30,6 @@
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#define PMU_REGS_OFFS 0xd802c
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#define GC_REGS_OFFS 0xe802c
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#define DOVE_SB_REGS_VIRT_BASE IOMEM(0xfde00000)
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#define DOVE_GLOBAL_CONFIG_1 (DOVE_SB_REGS_VIRT_BASE + 0xe802C)
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#define DOVE_GLOBAL_CONFIG_1 (DOVE_SB_REGS_VIRT_BASE + 0xe802C)
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#define DOVE_TWSI_ENABLE_OPTION1 BIT(7)
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#define DOVE_GLOBAL_CONFIG_2 (DOVE_SB_REGS_VIRT_BASE + 0xe8030)
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#define DOVE_TWSI_ENABLE_OPTION2 BIT(20)
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#define DOVE_TWSI_ENABLE_OPTION3 BIT(21)
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#define DOVE_TWSI_OPTION3_GPIO BIT(22)
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#define DOVE_SSP_CTRL_STATUS_1 (DOVE_SB_REGS_VIRT_BASE + 0xe8034)
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#define DOVE_SSP_ON_AU1 BIT(0)
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#define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE + 0xe803c)
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#define DOVE_AU1_SPDIFO_GPIO_EN BIT(1)
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#define DOVE_NAND_GPIO_EN BIT(0)
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#define DOVE_GPIO_LO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE + 0xd0400)
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/* MPP Base registers */
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#define PMU_MPP_GENERAL_CTRL 0x10
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#define AU0_AC97_SEL BIT(16)
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@ -61,6 +46,19 @@
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#define PMU_SIGNAL_SELECT_0 0x00
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#define PMU_SIGNAL_SELECT_1 0x04
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/* Global Config regmap registers */
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#define GLOBAL_CONFIG_1 0x00
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#define TWSI_ENABLE_OPTION1 BIT(7)
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#define GLOBAL_CONFIG_2 0x04
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#define TWSI_ENABLE_OPTION2 BIT(20)
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#define TWSI_ENABLE_OPTION3 BIT(21)
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#define TWSI_OPTION3_GPIO BIT(22)
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#define SSP_CTRL_STATUS_1 0x08
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#define SSP_ON_AU1 BIT(0)
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#define MPP_GENERAL_CONFIG 0x10
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#define AU1_SPDIFO_GPIO_EN BIT(1)
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#define NAND_GPIO_EN BIT(0)
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#define CONFIG_PMU BIT(4)
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static void __iomem *mpp_base;
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@ -182,23 +180,19 @@ static int dove_mpp4_ctrl_set(unsigned pid, unsigned long config)
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static int dove_nand_ctrl_get(unsigned pid, unsigned long *config)
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{
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unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE);
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unsigned int gmpp;
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*config = ((gmpp & DOVE_NAND_GPIO_EN) != 0);
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regmap_read(gconfmap, MPP_GENERAL_CONFIG, &gmpp);
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*config = ((gmpp & NAND_GPIO_EN) != 0);
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return 0;
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}
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static int dove_nand_ctrl_set(unsigned pid, unsigned long config)
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{
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unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE);
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gmpp &= ~DOVE_NAND_GPIO_EN;
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if (config)
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gmpp |= DOVE_NAND_GPIO_EN;
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writel(gmpp, DOVE_MPP_GENERAL_VIRT_BASE);
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regmap_update_bits(gconfmap, MPP_GENERAL_CONFIG,
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NAND_GPIO_EN,
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(config) ? NAND_GPIO_EN : 0);
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return 0;
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}
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@ -226,18 +220,22 @@ static int dove_audio0_ctrl_set(unsigned pid, unsigned long config)
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static int dove_audio1_ctrl_get(unsigned pid, unsigned long *config)
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{
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unsigned int mpp4 = readl(mpp4_base);
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unsigned long sspc1 = readl(DOVE_SSP_CTRL_STATUS_1);
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unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE);
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unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2);
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unsigned int sspc1;
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unsigned int gmpp;
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unsigned int gcfg2;
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regmap_read(gconfmap, SSP_CTRL_STATUS_1, &sspc1);
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regmap_read(gconfmap, MPP_GENERAL_CONFIG, &gmpp);
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regmap_read(gconfmap, GLOBAL_CONFIG_2, &gcfg2);
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*config = 0;
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if (mpp4 & AU1_GPIO_SEL)
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*config |= BIT(3);
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if (sspc1 & DOVE_SSP_ON_AU1)
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if (sspc1 & SSP_ON_AU1)
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*config |= BIT(2);
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if (gmpp & DOVE_AU1_SPDIFO_GPIO_EN)
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if (gmpp & AU1_SPDIFO_GPIO_EN)
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*config |= BIT(1);
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if (gcfg2 & DOVE_TWSI_OPTION3_GPIO)
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if (gcfg2 & TWSI_OPTION3_GPIO)
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*config |= BIT(0);
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/* SSP/TWSI only if I2S1 not set*/
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@ -252,31 +250,21 @@ static int dove_audio1_ctrl_get(unsigned pid, unsigned long *config)
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static int dove_audio1_ctrl_set(unsigned pid, unsigned long config)
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{
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unsigned int mpp4 = readl(mpp4_base);
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unsigned long sspc1 = readl(DOVE_SSP_CTRL_STATUS_1);
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unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE);
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unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2);
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/*
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* clear all audio1 related bits before configure
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*/
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gcfg2 &= ~DOVE_TWSI_OPTION3_GPIO;
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gmpp &= ~DOVE_AU1_SPDIFO_GPIO_EN;
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sspc1 &= ~DOVE_SSP_ON_AU1;
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mpp4 &= ~AU1_GPIO_SEL;
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if (config & BIT(0))
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gcfg2 |= DOVE_TWSI_OPTION3_GPIO;
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if (config & BIT(1))
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gmpp |= DOVE_AU1_SPDIFO_GPIO_EN;
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if (config & BIT(2))
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sspc1 |= DOVE_SSP_ON_AU1;
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if (config & BIT(3))
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mpp4 |= AU1_GPIO_SEL;
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writel(mpp4, mpp4_base);
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writel(sspc1, DOVE_SSP_CTRL_STATUS_1);
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writel(gmpp, DOVE_MPP_GENERAL_VIRT_BASE);
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writel(gcfg2, DOVE_GLOBAL_CONFIG_2);
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regmap_update_bits(gconfmap, SSP_CTRL_STATUS_1,
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SSP_ON_AU1,
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(config & BIT(2)) ? SSP_ON_AU1 : 0);
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regmap_update_bits(gconfmap, MPP_GENERAL_CONFIG,
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AU1_SPDIFO_GPIO_EN,
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(config & BIT(1)) ? AU1_SPDIFO_GPIO_EN : 0);
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regmap_update_bits(gconfmap, GLOBAL_CONFIG_2,
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TWSI_OPTION3_GPIO,
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(config & BIT(0)) ? TWSI_OPTION3_GPIO : 0);
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return 0;
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}
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@ -322,15 +310,18 @@ static int dove_audio1_ctrl_gpio_dir(unsigned pid, bool input)
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static int dove_twsi_ctrl_get(unsigned pid, unsigned long *config)
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{
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unsigned long gcfg1 = readl(DOVE_GLOBAL_CONFIG_1);
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unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2);
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unsigned int gcfg1;
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unsigned int gcfg2;
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regmap_read(gconfmap, GLOBAL_CONFIG_1, &gcfg1);
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regmap_read(gconfmap, GLOBAL_CONFIG_2, &gcfg2);
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*config = 0;
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if (gcfg1 & DOVE_TWSI_ENABLE_OPTION1)
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if (gcfg1 & TWSI_ENABLE_OPTION1)
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*config = 1;
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else if (gcfg2 & DOVE_TWSI_ENABLE_OPTION2)
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else if (gcfg2 & TWSI_ENABLE_OPTION2)
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*config = 2;
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else if (gcfg2 & DOVE_TWSI_ENABLE_OPTION3)
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else if (gcfg2 & TWSI_ENABLE_OPTION3)
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*config = 3;
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return 0;
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@ -338,26 +329,27 @@ static int dove_twsi_ctrl_get(unsigned pid, unsigned long *config)
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static int dove_twsi_ctrl_set(unsigned pid, unsigned long config)
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{
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unsigned long gcfg1 = readl(DOVE_GLOBAL_CONFIG_1);
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unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2);
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gcfg1 &= ~DOVE_TWSI_ENABLE_OPTION1;
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gcfg2 &= ~(DOVE_TWSI_ENABLE_OPTION2 | DOVE_TWSI_ENABLE_OPTION3);
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unsigned int gcfg1 = 0;
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unsigned int gcfg2 = 0;
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switch (config) {
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case 1:
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gcfg1 |= DOVE_TWSI_ENABLE_OPTION1;
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gcfg1 = TWSI_ENABLE_OPTION1;
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break;
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case 2:
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gcfg2 |= DOVE_TWSI_ENABLE_OPTION2;
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gcfg2 = TWSI_ENABLE_OPTION2;
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break;
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case 3:
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gcfg2 |= DOVE_TWSI_ENABLE_OPTION3;
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gcfg2 = TWSI_ENABLE_OPTION3;
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break;
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}
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writel(gcfg1, DOVE_GLOBAL_CONFIG_1);
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writel(gcfg2, DOVE_GLOBAL_CONFIG_2);
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regmap_update_bits(gconfmap, GLOBAL_CONFIG_1,
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TWSI_ENABLE_OPTION1,
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gcfg1);
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regmap_update_bits(gconfmap, GLOBAL_CONFIG_2,
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TWSI_ENABLE_OPTION2 | TWSI_ENABLE_OPTION3,
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gcfg2);
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return 0;
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}
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