From c794f6a09a251e229b122082eff1f85b994d2bca Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Wed, 14 Oct 2015 22:35:46 +0300 Subject: [PATCH 01/29] ARM: shmobile: porter: add HS-USB DT support Enable HS-USB device for the Porter board, defining the GPIO that the driver should check when probing (which is the ID output from MAX3355 OTG chip). Note that there will be pinctrl-related error messages if both internal PCI and HS-USB drivers are enabled but they should be just ignored. This patch is analogous to the commit 6f4f7156e0e6 ("ARM: shmobile: henninger: enable HS-USB") as there are no differences between the boards in this respect. Signed-off-by: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-porter.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts index fe0f12fc02a1..9f9ffe322d17 100644 --- a/arch/arm/boot/dts/r8a7791-porter.dts +++ b/arch/arm/boot/dts/r8a7791-porter.dts @@ -269,6 +269,14 @@ status = "okay"; }; +&hsusb { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + + status = "okay"; + renesas,enable-gpio = <&gpio5 31 GPIO_ACTIVE_HIGH>; +}; + &usbphy { status = "okay"; }; From b6be6b2f3be270cbd53fb13706c32500f6cd1432 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 16 Oct 2015 16:05:15 +0200 Subject: [PATCH 02/29] ARM: shmobile: r8a7794 dtsi: Remove bogus imp_clk node R-Car E2 does not have an IMP core or an IMP clock. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 8 -------- 1 file changed, 8 deletions(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index a9977d6ee81a..6fc1acff507f 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -879,14 +879,6 @@ clock-mult = <1>; clock-output-names = "m2"; }; - imp_clk: imp_clk { - compatible = "fixed-factor-clock"; - clocks = <&cpg_clocks R8A7794_CLK_PLL1>; - #clock-cells = <0>; - clock-div = <4>; - clock-mult = <1>; - clock-output-names = "imp"; - }; rclk_clk: rclk_clk { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7794_CLK_PLL1>; From 5d2ac865a609ff1c5a5228c8721e7ae06f5f7b72 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 16 Oct 2015 16:05:16 +0200 Subject: [PATCH 03/29] ARM: shmobile: r8a7791 dtsi: Remove bogus imp_clk node R-Car M2-W does not have an IMP core or an IMP clock. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 8 -------- 1 file changed, 8 deletions(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 3b8e26dde36d..57029d3fe1e5 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1163,14 +1163,6 @@ clock-mult = <1>; clock-output-names = "m2"; }; - imp_clk: imp_clk { - compatible = "fixed-factor-clock"; - clocks = <&cpg_clocks R8A7791_CLK_PLL1>; - #clock-cells = <0>; - clock-div = <4>; - clock-mult = <1>; - clock-output-names = "imp"; - }; rclk_clk: rclk_clk { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL1>; From 761b11e141366743a5c179a0f94c237d0ba9667c Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Fri, 16 Oct 2015 14:37:01 -0700 Subject: [PATCH 04/29] ARM: shmobile: silk: add SDHI1 DT support Define the SILK board dependent part of the SDHI1 (connected to micro-SD slot) device nodes along with the necessary voltage regulators. Based on the original patch by Vladimir Barinov . Signed-off-by: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-silk.dts | 40 ++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts index 48ff3e2958ae..a49942b626c8 100644 --- a/arch/arm/boot/dts/r8a7794-silk.dts +++ b/arch/arm/boot/dts/r8a7794-silk.dts @@ -12,6 +12,7 @@ /dts-v1/; #include "r8a7794.dtsi" +#include / { model = "SILK"; @@ -39,6 +40,30 @@ regulator-boot-on; regulator-always-on; }; + + vcc_sdhi1: regulator@3 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI1 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi1: regulator@4 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI1 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; }; &extal_clk { @@ -71,6 +96,11 @@ renesas,function = "mmc"; }; + sdhi1_pins: sd1 { + renesas,groups = "sdhi1_data4", "sdhi1_ctrl"; + renesas,function = "sdhi1"; + }; + qspi_pins: spi0 { renesas,groups = "qspi_ctrl", "qspi_data4"; renesas,function = "qspi"; @@ -147,6 +177,16 @@ status = "okay"; }; +&sdhi1 { + pinctrl-0 = <&sdhi1_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi1>; + vqmmc-supply = <&vccq_sdhi1>; + cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + &qspi { pinctrl-0 = <&qspi_pins>; pinctrl-names = "default"; From 0cc16889e77a95568806b1e45af104f75547eac9 Mon Sep 17 00:00:00 2001 From: Sudeep Holla Date: Wed, 21 Oct 2015 11:10:11 +0100 Subject: [PATCH 05/29] ARM: dts: shmobile/r8a7xxx: replace gpio-key, wakeup with wakeup-source property Though the keyboard driver for GPIO buttons(gpio-keys) will continue to check for/support the legacy "gpio-key,wakeup" boolean property to enable gpio buttons as wakeup source, "wakeup-source" is the new standard binding. This patch replaces the legacy "gpio-key,wakeup" with the unified "wakeup-source" property in order to avoid any futher copy-paste duplication. Signed-off-by: Sudeep Holla Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 2 +- arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 2 +- arch/arm/boot/dts/r8a7790-lager.dts | 8 +++---- arch/arm/boot/dts/r8a7791-koelsch.dts | 22 +++++++++---------- arch/arm/boot/dts/sh73a0-kzm9g.dts | 2 +- 5 files changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts index a4c425923c05..9b7eabd3eba3 100644 --- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts +++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts @@ -110,7 +110,7 @@ gpios = <&pfc 324 GPIO_ACTIVE_LOW>; linux,code = ; label = "S16"; - gpio-key,wakeup; + wakeup-source; }; menu-key { diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts index 105d9c95de4a..78a21f2828df 100644 --- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts +++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts @@ -85,7 +85,7 @@ gpios = <&pfc 99 GPIO_ACTIVE_LOW>; linux,code = ; label = "SW3"; - gpio-key,wakeup; + wakeup-source; }; back-key { diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index c553abd711ee..e2174d816e78 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -77,28 +77,28 @@ button@1 { linux,code = ; label = "SW2-1"; - gpio-key,wakeup; + wakeup-source; debounce-interval = <20>; gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; }; button@2 { linux,code = ; label = "SW2-2"; - gpio-key,wakeup; + wakeup-source; debounce-interval = <20>; gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; }; button@3 { linux,code = ; label = "SW2-3"; - gpio-key,wakeup; + wakeup-source; debounce-interval = <20>; gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; }; button@4 { linux,code = ; label = "SW2-4"; - gpio-key,wakeup; + wakeup-source; debounce-interval = <20>; gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index fc44ea361a4b..98da99d1b7dc 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -79,77 +79,77 @@ gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; linux,code = ; label = "SW2-1"; - gpio-key,wakeup; + wakeup-source; debounce-interval = <20>; }; key-2 { gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; linux,code = ; label = "SW2-2"; - gpio-key,wakeup; + wakeup-source; debounce-interval = <20>; }; key-3 { gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; linux,code = ; label = "SW2-3"; - gpio-key,wakeup; + wakeup-source; debounce-interval = <20>; }; key-4 { gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; linux,code = ; label = "SW2-4"; - gpio-key,wakeup; + wakeup-source; debounce-interval = <20>; }; key-a { gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; linux,code = ; label = "SW30"; - gpio-key,wakeup; + wakeup-source; debounce-interval = <20>; }; key-b { gpios = <&gpio7 1 GPIO_ACTIVE_LOW>; linux,code = ; label = "SW31"; - gpio-key,wakeup; + wakeup-source; debounce-interval = <20>; }; key-c { gpios = <&gpio7 2 GPIO_ACTIVE_LOW>; linux,code = ; label = "SW32"; - gpio-key,wakeup; + wakeup-source; debounce-interval = <20>; }; key-d { gpios = <&gpio7 3 GPIO_ACTIVE_LOW>; linux,code = ; label = "SW33"; - gpio-key,wakeup; + wakeup-source; debounce-interval = <20>; }; key-e { gpios = <&gpio7 4 GPIO_ACTIVE_LOW>; linux,code = ; label = "SW34"; - gpio-key,wakeup; + wakeup-source; debounce-interval = <20>; }; key-f { gpios = <&gpio7 5 GPIO_ACTIVE_LOW>; linux,code = ; label = "SW35"; - gpio-key,wakeup; + wakeup-source; debounce-interval = <20>; }; key-g { gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; linux,code = ; label = "SW36"; - gpio-key,wakeup; + wakeup-source; debounce-interval = <20>; }; }; diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts index 7fc5602810ad..aa8bae3b8fcf 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g.dts @@ -147,7 +147,7 @@ gpios = <&pcf8575 14 GPIO_ACTIVE_LOW>; linux,code = ; label = "SW1"; - gpio-key,wakeup; + wakeup-source; }; }; From 56a2182f6ada123759041bf28d066bb509fe358b Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Thu, 22 Oct 2015 02:04:41 +0300 Subject: [PATCH 06/29] ARM: shmobile: r8a7790: fix "gpio-ranges" props On R8A7790, GPIO banks 1 and 2 are missing pins 30 and 31. Correct the "gpio-ranges" properties of the corresponding device nodes. Signed-off-by: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index ae5eb281d43a..b545fef3f7db 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -143,7 +143,7 @@ interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; - gpio-ranges = <&pfc 0 32 32>; + gpio-ranges = <&pfc 0 32 30>; #interrupt-cells = <2>; interrupt-controller; clocks = <&mstp9_clks R8A7790_CLK_GPIO1>; @@ -156,7 +156,7 @@ interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; - gpio-ranges = <&pfc 0 64 32>; + gpio-ranges = <&pfc 0 64 30>; #interrupt-cells = <2>; interrupt-controller; clocks = <&mstp9_clks R8A7790_CLK_GPIO2>; From 1329f6d0f6a502089ed00038493985f2a4d97006 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Thu, 22 Oct 2015 02:05:19 +0300 Subject: [PATCH 07/29] ARM: shmobile: r8a7791: fix "gpio-ranges" props On R8A7791, GPIO banks 1 and 7 are missing pins 26 to 31. Correct the "gpio-ranges" properties of the GPIO1 node (GPIO7 is already correct). Signed-off-by: Sergei Shtylyov Tested-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 57029d3fe1e5..2bc54e359768 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -100,7 +100,7 @@ interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; - gpio-ranges = <&pfc 0 32 32>; + gpio-ranges = <&pfc 0 32 26>; #interrupt-cells = <2>; interrupt-controller; clocks = <&mstp9_clks R8A7791_CLK_GPIO1>; From 832d3e4c823be3c09e20b33793ac668c77ea5bd6 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Sun, 18 Oct 2015 14:26:56 +0900 Subject: [PATCH 08/29] ARM: shmobile: r8a7794: Disable all IPMMU nodes by default The r8a7794 IPMMU nodes for MX and DS are currently lacking a line containing 'status = "disabled"', fix this by making sure they are disabled like all other IPMMU nodes. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 6fc1acff507f..018ff56470b6 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -1097,6 +1097,7 @@ interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>, <0 199 IRQ_TYPE_LEVEL_HIGH>; #iommu-cells = <1>; + status = "disabled"; }; ipmmu_mp: mmu@ec680000 { @@ -1113,6 +1114,7 @@ interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, <0 221 IRQ_TYPE_LEVEL_HIGH>; #iommu-cells = <1>; + status = "disabled"; }; ipmmu_gp: mmu@e62a0000 { From 098cb3a601e6a6afcf1d0c15bc939a57732242a4 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Sun, 18 Oct 2015 14:35:41 +0900 Subject: [PATCH 09/29] ARM: shmobile: r8a7793: Add IPMMU nodes Add IPMMU nodes for the r8a7793 SoC. The IPMMU configuration for r8a7793 is identical to r8a7791 and includes SY0, SY1, DS, MP, MX, RT and GP. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 59 ++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index c4654047e684..fcafa87616fa 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -371,4 +371,63 @@ }; }; + ipmmu_sy0: mmu@e6280000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xe6280000 0 0x1000>; + interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>, + <0 224 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_sy1: mmu@e6290000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xe6290000 0 0x1000>; + interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ds: mmu@e6740000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xe6740000 0 0x1000>; + interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>, + <0 199 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mp: mmu@ec680000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xec680000 0 0x1000>; + interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mx: mmu@fe951000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xfe951000 0 0x1000>; + interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, + <0 221 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_rt: mmu@ffc80000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xffc80000 0 0x1000>; + interrupts = <0 307 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_gp: mmu@e62a0000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xe62a0000 0 0x1000>; + interrupts = <0 260 IRQ_TYPE_LEVEL_HIGH>, + <0 261 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; }; From 0768fbad7fba1d2793cb4b57e30786e32d203948 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Wed, 28 Oct 2015 00:03:22 +0300 Subject: [PATCH 10/29] ARM: shmobile: porter: add CAN0 DT support Define the Porter board dependent part of the CAN0 device node. This patch is analogous to the commit 457acc4a6ce8 ("ARM: shmobile: henninger: add CAN0 DT support") as there are no differences between the boards in this respect. Signed-off-by: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-porter.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts index 9f9ffe322d17..3e198e7b3ee4 100644 --- a/arch/arm/boot/dts/r8a7791-porter.dts +++ b/arch/arm/boot/dts/r8a7791-porter.dts @@ -134,6 +134,11 @@ renesas,groups = "vin0_data8", "vin0_clk"; renesas,function = "vin0"; }; + + can0_pins: can0 { + renesas,groups = "can0_data"; + renesas,function = "can0"; + }; }; &scif0 { @@ -288,3 +293,10 @@ &pciec { status = "okay"; }; + +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; From 2b06f1087062c516ac2851ce5038fdb035b19d4d Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Thu, 29 Oct 2015 00:34:29 +0300 Subject: [PATCH 11/29] ARM: shmobile: henninger: remove board DT The Henninger low cost board was never sold and so had no users outside Renesas (and Cogent Embedded). Instead Renesas has made the Porter board which has mostly similar hardware. Now that the Porter board support is on par with Henninger, we can remove the Henninger's device tree file. Signed-off-by: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/boot/dts/Makefile | 1 - arch/arm/boot/dts/r8a7791-henninger.dts | 320 ------------------------ 2 files changed, 321 deletions(-) delete mode 100644 arch/arm/boot/dts/r8a7791-henninger.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index d285d9816d9d..d3de3a447d72 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -530,7 +530,6 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \ r8a7778-bockw.dtb \ r8a7779-marzen.dtb \ r8a7790-lager.dtb \ - r8a7791-henninger.dtb \ r8a7791-koelsch.dtb \ r8a7791-porter.dtb \ r8a7793-gose.dtb \ diff --git a/arch/arm/boot/dts/r8a7791-henninger.dts b/arch/arm/boot/dts/r8a7791-henninger.dts deleted file mode 100644 index 655d1804e5e9..000000000000 --- a/arch/arm/boot/dts/r8a7791-henninger.dts +++ /dev/null @@ -1,320 +0,0 @@ -/* - * Device Tree Source for the Henninger board - * - * Copyright (C) 2014 Renesas Solutions Corp. - * Copyright (C) 2014 Cogent Embedded, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -/dts-v1/; -#include "r8a7791.dtsi" -#include - -/ { - model = "Henninger"; - compatible = "renesas,henninger", "renesas,r8a7791"; - - aliases { - serial0 = &scif0; - }; - - chosen { - bootargs = "console=ttySC0,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp"; - stdout-path = &scif0; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0 0x40000000 0 0x40000000>; - }; - - memory@200000000 { - device_type = "memory"; - reg = <2 0x00000000 0 0x40000000>; - }; - - vcc_sdhi0: regulator@0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vccq_sdhi0: regulator@1 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1 - 1800000 0>; - }; - - vcc_sdhi2: regulator@2 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI2 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vccq_sdhi2: regulator@3 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI2 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1 - 1800000 0>; - }; -}; - -&extal_clk { - clock-frequency = <20000000>; -}; - -&pfc { - scif0_pins: serial0 { - renesas,groups = "scif0_data_d"; - renesas,function = "scif0"; - }; - - ether_pins: ether { - renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; - renesas,function = "eth"; - }; - - phy1_pins: phy1 { - renesas,groups = "intc_irq0"; - renesas,function = "intc"; - }; - - sdhi0_pins: sd0 { - renesas,groups = "sdhi0_data4", "sdhi0_ctrl"; - renesas,function = "sdhi0"; - }; - - sdhi2_pins: sd2 { - renesas,groups = "sdhi2_data4", "sdhi2_ctrl"; - renesas,function = "sdhi2"; - }; - - i2c2_pins: i2c2 { - renesas,groups = "i2c2"; - renesas,function = "i2c2"; - }; - - qspi_pins: spi0 { - renesas,groups = "qspi_ctrl", "qspi_data4"; - renesas,function = "qspi"; - }; - - msiof0_pins: spi1 { - renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx", - "msiof0_tx"; - renesas,function = "msiof0"; - }; - - usb0_pins: usb0 { - renesas,groups = "usb0"; - renesas,function = "usb0"; - }; - - usb1_pins: usb1 { - renesas,groups = "usb1"; - renesas,function = "usb1"; - }; - - vin0_pins: vin0 { - renesas,groups = "vin0_data8", "vin0_clk"; - renesas,function = "vin0"; - }; - - can0_pins: can0 { - renesas,groups = "can0_data"; - renesas,function = "can0"; - }; -}; - -&scif0 { - pinctrl-0 = <&scif0_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -ðer { - pinctrl-0 = <ðer_pins &phy1_pins>; - pinctrl-names = "default"; - - phy-handle = <&phy1>; - renesas,ether-link-active-low; - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - interrupt-parent = <&irqc0>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - micrel,led-mode = <1>; - }; -}; - -&sata0 { - status = "okay"; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-names = "default"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&sdhi2 { - pinctrl-0 = <&sdhi2_pins>; - pinctrl-names = "default"; - - vmmc-supply = <&vcc_sdhi2>; - vqmmc-supply = <&vccq_sdhi2>; - cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&i2c2 { - pinctrl-0 = <&i2c2_pins>; - pinctrl-names = "default"; - - status = "okay"; - clock-frequency = <400000>; - - composite-in@20 { - compatible = "adi,adv7180"; - reg = <0x20>; - remote = <&vin0>; - - port { - adv7180: endpoint { - bus-width = <8>; - remote-endpoint = <&vin0ep>; - }; - }; - }; -}; - -&qspi { - pinctrl-0 = <&qspi_pins>; - pinctrl-names = "default"; - - status = "okay"; - - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25fl512s", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <30000000>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - m25p,fast-read; - - partition@0 { - label = "loader_prg"; - reg = <0x00000000 0x00040000>; - read-only; - }; - partition@40000 { - label = "user_prg"; - reg = <0x00040000 0x00400000>; - read-only; - }; - partition@440000 { - label = "flash_fs"; - reg = <0x00440000 0x03bc0000>; - }; - }; -}; - -&msiof0 { - pinctrl-0 = <&msiof0_pins>; - pinctrl-names = "default"; - - status = "okay"; - - pmic@0 { - compatible = "renesas,r2a11302ft"; - reg = <0>; - spi-max-frequency = <6000000>; - spi-cpol; - spi-cpha; - }; -}; - -&pci0 { - status = "okay"; - pinctrl-0 = <&usb0_pins>; - pinctrl-names = "default"; -}; - -&pci1 { - status = "okay"; - pinctrl-0 = <&usb1_pins>; - pinctrl-names = "default"; -}; - -&hsusb { - status = "okay"; - pinctrl-0 = <&usb0_pins>; - pinctrl-names = "default"; - renesas,enable-gpio = <&gpio5 31 GPIO_ACTIVE_HIGH>; -}; - -&usbphy { - status = "okay"; -}; - -&pcie_bus_clk { - status = "okay"; -}; - -&pciec { - status = "okay"; -}; - -/* composite video input */ -&vin0 { - status = "okay"; - pinctrl-0 = <&vin0_pins>; - pinctrl-names = "default"; - - port { - #address-cells = <1>; - #size-cells = <0>; - - vin0ep: endpoint { - remote-endpoint = <&adv7180>; - bus-width = <8>; - }; - }; -}; - -&can0 { - pinctrl-0 = <&can0_pins>; - pinctrl-names = "default"; - status = "okay"; -}; From 0fddfb5b609f3b037006bcd467c540a7968a2dc7 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 6 Nov 2015 16:30:48 +0900 Subject: [PATCH 12/29] ARM: shmobile: r8a7793: Add thermal device to DT Instantiate the thermal sensor in the r8a7793 device tree. Based on very similar work for the r8a7790 by Magnus Damm. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7793.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index fcafa87616fa..6c7bae4318c9 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -53,6 +53,14 @@ interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; }; + thermal@e61f0000 { + compatible = "renesas,thermal-r8a7793", "renesas,rcar-thermal"; + reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; + interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp5_clks R8A7793_CLK_THERMAL>; + power-domains = <&cpg_clocks>; + }; + timer { compatible = "arm,armv7-timer"; interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, @@ -329,6 +337,14 @@ clock-indices = ; clock-output-names = "irqc"; }; + mstp5_clks: mstp5_clks@e6150144 { + compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; + clocks = <&extal_clk>; + #clock-cells = <1>; + clock-indices = ; + clock-output-names = "thermal"; + }; mstp7_clks: mstp7_clks@e615014c { compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; From c26455c7e3e4dd16caa4788fdd558e5fcee04742 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 9 Nov 2015 10:33:18 +0900 Subject: [PATCH 13/29] ARM: shmobile: r8a7793: Add PFC to DT Instantiate PFC device in r8a7793 DT. Based on similar work for the r8a7791 by Magnus Damm. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 6c7bae4318c9..4f6480f8845f 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -122,6 +122,12 @@ power-domains = <&cpg_clocks>; }; + pfc: pfc@e6060000 { + compatible = "renesas,pfc-r8a7793"; + reg = <0 0xe6060000 0 0x250>; + #gpio-range-cells = <3>; + }; + scif0: serial@e6e60000 { compatible = "renesas,scif-r8a7793", "renesas,scif"; reg = <0 0xe6e60000 0 64>; From a81f05089aad81607bb4bcf9ccfb41ef4814d95e Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 9 Nov 2015 10:33:19 +0900 Subject: [PATCH 14/29] ARM: shmobile: gose: Configure PFC in DT Configure PFC for the already enabled scif and ethernet devices in the device tree for the gose board. Based on similar work for the koelsch board by Laurent Pinchart and Sergei Shtylyov. Signed-off-by: Simon Horman Acked-by: Laurent Pinchart --- arch/arm/boot/dts/r8a7793-gose.dts | 31 ++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index 96443ec5f6ab..1575ef759047 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -37,7 +37,32 @@ clock-frequency = <20000000>; }; +&pfc { + scif0_pins: serial0 { + renesas,groups = "scif0_data_d"; + renesas,function = "scif0"; + }; + + scif1_pins: serial1 { + renesas,groups = "scif1_data_d"; + renesas,function = "scif1"; + }; + + ether_pins: ether { + renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; + renesas,function = "eth"; + }; + + phy1_pins: phy1 { + renesas,groups = "intc_irq0"; + renesas,function = "intc"; + }; +}; + ðer { + pinctrl-0 = <ðer_pins &phy1_pins>; + pinctrl-names = "default"; + phy-handle = <&phy1>; renesas,ether-link-active-low; status = "okay"; @@ -55,9 +80,15 @@ }; &scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + status = "okay"; }; &scif1 { + pinctrl-0 = <&scif1_pins>; + pinctrl-names = "default"; + status = "okay"; }; From 27fa0a6c55537f8d8656b9e59ae584b0b427232a Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 10 Nov 2015 09:35:06 +0100 Subject: [PATCH 15/29] ARM: shmobile: koelsch: Move SPI FLASH partitions to subnode As of commits 5cfdedb7b9a0fe38 ("mtd: ofpart: move ofpart partitions to a dedicated dt node") and fe2585e9c29a650a ("doc: dt: mtd: support partitions in a special 'partitions' subnode"), having partitions as direct subnodes of an mtd device is discouraged: spi0.0: 'partitions' subnode not found on /spi@e6b10000/flash@0. Trying to parse direct subnodes as partitions. Hence move the SPI FLASH partitions to a "partitions" subnode. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-koelsch.dts | 33 +++++++++++++++------------ 1 file changed, 18 insertions(+), 15 deletions(-) diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index 98da99d1b7dc..4ec2d1fba7c9 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -479,8 +479,6 @@ status = "okay"; flash: flash@0 { - #address-cells = <1>; - #size-cells = <1>; compatible = "spansion,s25fl512s", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <30000000>; @@ -490,19 +488,24 @@ spi-cpol; m25p,fast-read; - partition@0 { - label = "loader"; - reg = <0x00000000 0x00080000>; - read-only; - }; - partition@80000 { - label = "user"; - reg = <0x00080000 0x00580000>; - read-only; - }; - partition@600000 { - label = "flash"; - reg = <0x00600000 0x03a00000>; + partitions { + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "loader"; + reg = <0x00000000 0x00080000>; + read-only; + }; + partition@80000 { + label = "user"; + reg = <0x00080000 0x00580000>; + read-only; + }; + partition@600000 { + label = "flash"; + reg = <0x00600000 0x03a00000>; + }; }; }; }; From 38eb6a3aaf08cc8a70ef3d6a767521e2831a8a4c Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 12 Nov 2015 10:29:21 +0900 Subject: [PATCH 16/29] ARM: shmobile: r8a7793: Add DMAC devices to DT Instantiate the two system DMA controllers in the r8a7793 device tree. Based on similar work for the r8a7793 by Laurent Pinchart. Signed-off-by: Simon Horman Reviewed-by: Laurent Pinchart --- arch/arm/boot/dts/r8a7793.dtsi | 72 ++++++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 4f6480f8845f..187a82dc7d9f 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -128,6 +128,68 @@ #gpio-range-cells = <3>; }; + dmac0: dma-controller@e6700000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xe6700000 0 0x20000>; + interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH + 0 200 IRQ_TYPE_LEVEL_HIGH + 0 201 IRQ_TYPE_LEVEL_HIGH + 0 202 IRQ_TYPE_LEVEL_HIGH + 0 203 IRQ_TYPE_LEVEL_HIGH + 0 204 IRQ_TYPE_LEVEL_HIGH + 0 205 IRQ_TYPE_LEVEL_HIGH + 0 206 IRQ_TYPE_LEVEL_HIGH + 0 207 IRQ_TYPE_LEVEL_HIGH + 0 208 IRQ_TYPE_LEVEL_HIGH + 0 209 IRQ_TYPE_LEVEL_HIGH + 0 210 IRQ_TYPE_LEVEL_HIGH + 0 211 IRQ_TYPE_LEVEL_HIGH + 0 212 IRQ_TYPE_LEVEL_HIGH + 0 213 IRQ_TYPE_LEVEL_HIGH + 0 214 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14"; + clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC0>; + clock-names = "fck"; + power-domains = <&cpg_clocks>; + #dma-cells = <1>; + dma-channels = <15>; + }; + + dmac1: dma-controller@e6720000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xe6720000 0 0x20000>; + interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH + 0 216 IRQ_TYPE_LEVEL_HIGH + 0 217 IRQ_TYPE_LEVEL_HIGH + 0 218 IRQ_TYPE_LEVEL_HIGH + 0 219 IRQ_TYPE_LEVEL_HIGH + 0 308 IRQ_TYPE_LEVEL_HIGH + 0 309 IRQ_TYPE_LEVEL_HIGH + 0 310 IRQ_TYPE_LEVEL_HIGH + 0 311 IRQ_TYPE_LEVEL_HIGH + 0 312 IRQ_TYPE_LEVEL_HIGH + 0 313 IRQ_TYPE_LEVEL_HIGH + 0 314 IRQ_TYPE_LEVEL_HIGH + 0 315 IRQ_TYPE_LEVEL_HIGH + 0 316 IRQ_TYPE_LEVEL_HIGH + 0 317 IRQ_TYPE_LEVEL_HIGH + 0 318 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14"; + clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC1>; + clock-names = "fck"; + power-domains = <&cpg_clocks>; + #dma-cells = <1>; + dma-channels = <15>; + }; + scif0: serial@e6e60000 { compatible = "renesas,scif-r8a7793", "renesas,scif"; reg = <0 0xe6e60000 0 64>; @@ -313,6 +375,16 @@ "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1", "vsp1-du0", "vsps"; }; + mstp2_clks: mstp2_clks@e6150138 { + compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; + clocks = <&zs_clk>, <&zs_clk>; + #clock-cells = <1>; + clock-indices = < + R8A7793_CLK_SYS_DMAC1 R8A7793_CLK_SYS_DMAC0 + >; + clock-output-names = "sys-dmac1", "sys-dmac0"; + }; mstp3_clks: mstp3_clks@e615013c { compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; From 469352ad3c43e689c15cd396cbb750ee831ab63e Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 12 Nov 2015 10:29:22 +0900 Subject: [PATCH 17/29] ARM: shmobile: r8a7793: Add QSPI device to DT Instantiate the QSPI controller in the r8a7793 device tree. Based on similar work for the r8a7794 by Hisashi Nakamura and Sergei Shtylyov. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 187a82dc7d9f..aa9b64c14a09 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -18,6 +18,10 @@ #address-cells = <2>; #size-cells = <2>; + aliases { + spi0 = &qspi; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -222,6 +226,20 @@ status = "disabled"; }; + qspi: spi@e6b10000 { + compatible = "renesas,qspi-r8a7793", "renesas,qspi"; + reg = <0 0xe6b10000 0 0x2c>; + interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7793_CLK_QSPI_MOD>; + dmas = <&dmac0 0x17>, <&dmac0 0x18>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + clocks { #address-cells = <2>; #size-cells = <2>; @@ -463,6 +481,14 @@ "ipmmu_sgx", "vin2", "vin1", "vin0", "ether", "sata1", "sata0"; }; + mstp9_clks: mstp9_clks@e6150994 { + compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; + clocks = <&cpg_clocks R8A7793_CLK_QSPI>; + #clock-cells = <1>; + clock-indices = ; + clock-output-names = "qspi_mod"; + }; }; ipmmu_sy0: mmu@e6280000 { From 6380d62a1b1ca498f2187c9702f1dec00ad527e0 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 12 Nov 2015 10:29:23 +0900 Subject: [PATCH 18/29] ARM: shmobile: gose: Add QSPI device to DT Enable the QSPI controller in the gose device tree. Based on similar work for the silk board by Vladimir Barinov and Sergei Shtylyov. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7793-gose.dts | 43 ++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index 1575ef759047..d842ce77b7c8 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -57,6 +57,11 @@ renesas,groups = "intc_irq0"; renesas,function = "intc"; }; + + qspi_pins: spi0 { + renesas,groups = "qspi_ctrl", "qspi_data4"; + renesas,function = "qspi"; + }; }; ðer { @@ -92,3 +97,41 @@ status = "okay"; }; + +&qspi { + pinctrl-0 = <&qspi_pins>; + pinctrl-names = "default"; + + status = "okay"; + + flash@0 { + compatible = "spansion,s25fl512s", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <30000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-cpol; + spi-cpha; + m25p,fast-read; + + partitions { + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "loader"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition@40000 { + label = "user"; + reg = <0x00040000 0x00400000>; + read-only; + }; + partition@440000 { + label = "flash"; + reg = <0x00440000 0x03bc0000>; + }; + }; + }; +}; From 9859cd3b1582cbe39f969a500d8b7fc87c4b87b8 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Mon, 16 Nov 2015 17:57:11 +0900 Subject: [PATCH 19/29] ARM: shmobile: r8a7794: Add DU0 clock The DU0 clock is an MSTP clock, child of the CPG ZX clock. Signed-off-by: Laurent Pinchart Acked-by: Geert Uytterhoeven Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 7 ++++--- include/dt-bindings/clock/r8a7794-clock.h | 1 + 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 018ff56470b6..b70e4061d8b1 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -1017,19 +1017,20 @@ reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; clocks = <&mp_clk>, <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>, - <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>; + <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, + <&zx_clk>; #clock-cells = <1>; clock-indices = < R8A7794_CLK_EHCI R8A7794_CLK_HSUSB R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5 R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0 R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1 - R8A7794_CLK_SCIF0 + R8A7794_CLK_SCIF0 R8A7794_CLK_DU0 >; clock-output-names = "ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0", - "scif3", "scif2", "scif1", "scif0"; + "scif3", "scif2", "scif1", "scif0", "du0"; }; mstp8_clks: mstp8_clks@e6150990 { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index 09da38a58776..a7a7e0370968 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -79,6 +79,7 @@ #define R8A7794_CLK_SCIF2 19 #define R8A7794_CLK_SCIF1 20 #define R8A7794_CLK_SCIF0 21 +#define R8A7794_CLK_DU0 24 /* MSTP8 */ #define R8A7794_CLK_VIN1 10 From 46c4f13d04d729fa79f7df2dd1978f9fc0ee6d6a Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Mon, 16 Nov 2015 17:57:20 +0900 Subject: [PATCH 20/29] ARM: shmobile: r8a7794: Add DU node to device tree Add the DU device with a disabled state. Boards that want to enable the DU need to specify the output topology. Signed-off-by: Laurent Pinchart Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index b70e4061d8b1..4075a0a3d5c1 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -750,6 +750,34 @@ }; }; + du: display@feb00000 { + compatible = "renesas,du-r8a7794"; + reg = <0 0xfeb00000 0 0x40000>; + reg-names = "du"; + interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>, + <0 268 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp7_clks R8A7794_CLK_DU0>, + <&mstp7_clks R8A7794_CLK_DU0>; + clock-names = "du.0", "du.1"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + du_out_rgb0: endpoint { + }; + }; + port@1 { + reg = <1>; + du_out_rgb1: endpoint { + }; + }; + }; + }; + clocks { #address-cells = <2>; #size-cells = <2>; From 876e7fb9f418fd86719af345febf8656c47e833c Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 16 Nov 2015 17:57:29 +0900 Subject: [PATCH 21/29] ARM: shmobile: r8a7794: alt: Enable VGA port Enable the DU device and the VGA port available on the r8a7794 ALT board. The VGA portion of the ALT board is somewhat similar to the Lager board but in case of ALT the DU1 pins are used and the X2 clock has a reduced frequency. This patch does not include any pinctrl (PFC) settings due to lack of PFC DT integration on r8a7794. At this point the default state of the boot loader is enough to keep the VGA port working without changing any pinctrl settings. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-alt.dts | 61 +++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts index 928cfa641475..a548007b9b10 100644 --- a/arch/arm/boot/dts/r8a7794-alt.dts +++ b/arch/arm/boot/dts/r8a7794-alt.dts @@ -33,6 +33,67 @@ #address-cells = <1>; #size-cells = <1>; }; + + vga-encoder { + compatible = "adi,adv7123"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7123_in: endpoint { + remote-endpoint = <&du_out_rgb1>; + }; + }; + port@1 { + reg = <1>; + adv7123_out: endpoint { + remote-endpoint = <&vga_in>; + }; + }; + }; + }; + + vga { + compatible = "vga-connector"; + + port { + vga_in: endpoint { + remote-endpoint = <&adv7123_out>; + }; + }; + }; + + x2_clk: x2-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <74250000>; + }; + + x13_clk: x13-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + }; +}; + +&du { + status = "okay"; + + clocks = <&mstp7_clks R8A7794_CLK_DU0>, + <&mstp7_clks R8A7794_CLK_DU0>, + <&x13_clk>, <&x2_clk>; + clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; + + ports { + port@1 { + endpoint { + remote-endpoint = <&adv7123_in>; + }; + }; + }; }; &extal_clk { From d96011d07728f7d66edf634407d2919e7708c5c3 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 16 Nov 2015 22:49:12 +0900 Subject: [PATCH 22/29] ARM: shmobile: r8a7793: Add GPIO nodes to device tree Add r8a7793 GPIO device nodes that are assumed to be identical to r8a7791. This matches the data sheet for GPIO and MSTP bits. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 121 ++++++++++++++++++++++++++++++++- 1 file changed, 118 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index aa9b64c14a09..36b6d4e67f34 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -57,6 +57,110 @@ interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; }; + gpio0: gpio@e6050000 { + compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; + reg = <0 0xe6050000 0 0x50>; + interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 0 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7793_CLK_GPIO0>; + power-domains = <&cpg_clocks>; + }; + + gpio1: gpio@e6051000 { + compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; + reg = <0 0xe6051000 0 0x50>; + interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 32 26>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7793_CLK_GPIO1>; + power-domains = <&cpg_clocks>; + }; + + gpio2: gpio@e6052000 { + compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; + reg = <0 0xe6052000 0 0x50>; + interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 64 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7793_CLK_GPIO2>; + power-domains = <&cpg_clocks>; + }; + + gpio3: gpio@e6053000 { + compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; + reg = <0 0xe6053000 0 0x50>; + interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 96 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7793_CLK_GPIO3>; + power-domains = <&cpg_clocks>; + }; + + gpio4: gpio@e6054000 { + compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; + reg = <0 0xe6054000 0 0x50>; + interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 128 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7793_CLK_GPIO4>; + power-domains = <&cpg_clocks>; + }; + + gpio5: gpio@e6055000 { + compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; + reg = <0 0xe6055000 0 0x50>; + interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 160 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7793_CLK_GPIO5>; + power-domains = <&cpg_clocks>; + }; + + gpio6: gpio@e6055400 { + compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; + reg = <0 0xe6055400 0 0x50>; + interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 192 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7793_CLK_GPIO6>; + power-domains = <&cpg_clocks>; + }; + + gpio7: gpio@e6055800 { + compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; + reg = <0 0xe6055800 0 0x50>; + interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 224 26>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&mstp9_clks R8A7793_CLK_GPIO7>; + power-domains = <&cpg_clocks>; + }; + thermal@e61f0000 { compatible = "renesas,thermal-r8a7793", "renesas,rcar-thermal"; reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; @@ -484,10 +588,21 @@ mstp9_clks: mstp9_clks@e6150994 { compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; - clocks = <&cpg_clocks R8A7793_CLK_QSPI>; + clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, + <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, + <&cpg_clocks R8A7793_CLK_QSPI>; #clock-cells = <1>; - clock-indices = ; - clock-output-names = "qspi_mod"; + clock-indices = < + R8A7793_CLK_GPIO7 R8A7793_CLK_GPIO6 + R8A7793_CLK_GPIO5 R8A7793_CLK_GPIO4 + R8A7793_CLK_GPIO3 R8A7793_CLK_GPIO2 + R8A7793_CLK_GPIO1 R8A7793_CLK_GPIO0 + R8A7793_CLK_QSPI_MOD + >; + clock-output-names = + "gpio7", "gpio6", "gpio5", "gpio4", + "gpio3", "gpio2", "gpio1", "gpio0", + "qspi_mod"; }; }; From 4af0a6640cb536cd66ecff1bb7827c76d2475bd9 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 13 Nov 2015 11:23:48 +0900 Subject: [PATCH 23/29] ARM: shmobile: r8a7790: Use SoC specific binding for rcar-dmac nodes Use the new SoC specific binding for rcar-dmac and the generic binding as a fall-back in the r8a7790 device tree. In general Renesas hardware is not documented to the extent where the relationship between IP blocks on different SoCs can be assumed although they may appear to operate the same way. Furthermore the documentation typically does not specify a version for individual IP blocks. For these reasons a convention of using the SoC name in place of a version and providing SoC-specific compat strings has been adopted. Although not universally liked this convention is used in the bindings for most drivers for Renesas hardware. The purpose of this patch is to update the Renesas R-Car DMA Controller nodes to follow this convention. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index b545fef3f7db..105bf9ae18cb 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -266,7 +266,7 @@ }; dmac0: dma-controller@e6700000 { - compatible = "renesas,rcar-dmac"; + compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x20000>; interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH 0 200 IRQ_TYPE_LEVEL_HIGH @@ -297,7 +297,7 @@ }; dmac1: dma-controller@e6720000 { - compatible = "renesas,rcar-dmac"; + compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; reg = <0 0xe6720000 0 0x20000>; interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH 0 216 IRQ_TYPE_LEVEL_HIGH @@ -328,7 +328,7 @@ }; audma0: dma-controller@ec700000 { - compatible = "renesas,rcar-dmac"; + compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH 0 320 IRQ_TYPE_LEVEL_HIGH @@ -357,7 +357,7 @@ }; audma1: dma-controller@ec720000 { - compatible = "renesas,rcar-dmac"; + compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; reg = <0 0xec720000 0 0x10000>; interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH 0 333 IRQ_TYPE_LEVEL_HIGH From e6d12b4990e79ecb0d39736df5d1877ad69fab4c Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 13 Nov 2015 11:23:49 +0900 Subject: [PATCH 24/29] ARM: shmobile: r8a7791: Use SoC specific binding for rcar-dmac nodes Use the new SoC specific binding for rcar-dmac and the generic binding as a fall-back in the r8a7791 device tree. In general Renesas hardware is not documented to the extent where the relationship between IP blocks on different SoCs can be assumed although they may appear to operate the same way. Furthermore the documentation typically does not specify a version for individual IP blocks. For these reasons a convention of using the SoC name in place of a version and providing SoC-specific compat strings has been adopted. Although not universally liked this convention is used in the bindings for most drivers for Renesas hardware. The purpose of this patch is to update the Renesas R-Car DMA Controller nodes to follow this convention. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 2bc54e359768..9f5f30e714c5 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -255,7 +255,7 @@ }; dmac0: dma-controller@e6700000 { - compatible = "renesas,rcar-dmac"; + compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x20000>; interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH 0 200 IRQ_TYPE_LEVEL_HIGH @@ -286,7 +286,7 @@ }; dmac1: dma-controller@e6720000 { - compatible = "renesas,rcar-dmac"; + compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; reg = <0 0xe6720000 0 0x20000>; interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH 0 216 IRQ_TYPE_LEVEL_HIGH @@ -317,7 +317,7 @@ }; audma0: dma-controller@ec700000 { - compatible = "renesas,rcar-dmac"; + compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH 0 320 IRQ_TYPE_LEVEL_HIGH @@ -346,7 +346,7 @@ }; audma1: dma-controller@ec720000 { - compatible = "renesas,rcar-dmac"; + compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; reg = <0 0xec720000 0 0x10000>; interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH 0 333 IRQ_TYPE_LEVEL_HIGH From 061c6c624b2f356a0d02b137ae4f46825ddd44d1 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 13 Nov 2015 11:23:50 +0900 Subject: [PATCH 25/29] ARM: shmobile: r8a7793: Use SoC specific binding for rcar-dmac nodes Use the new SoC specific binding for rcar-dmac and the generic binding as a fall-back in the r8a7793 device tree. In general Renesas hardware is not documented to the extent where the relationship between IP blocks on different SoCs can be assumed although they may appear to operate the same way. Furthermore the documentation typically does not specify a version for individual IP blocks. For these reasons a convention of using the SoC name in place of a version and providing SoC-specific compat strings has been adopted. Although not universally liked this convention is used in the bindings for most drivers for Renesas hardware. The purpose of this patch is to update the Renesas R-Car DMA Controller nodes to follow this convention. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 36b6d4e67f34..2378df52aa32 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -237,7 +237,7 @@ }; dmac0: dma-controller@e6700000 { - compatible = "renesas,rcar-dmac"; + compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x20000>; interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH 0 200 IRQ_TYPE_LEVEL_HIGH @@ -268,7 +268,7 @@ }; dmac1: dma-controller@e6720000 { - compatible = "renesas,rcar-dmac"; + compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; reg = <0 0xe6720000 0 0x20000>; interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH 0 216 IRQ_TYPE_LEVEL_HIGH From 0a3d058b8ae857d270a0d34081554192f3e2e566 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 13 Nov 2015 11:23:51 +0900 Subject: [PATCH 26/29] ARM: shmobile: r8a7794: Use SoC specific binding for rcar-dmac nodes Use the new SoC specific binding for rcar-dmac and the generic binding as a fall-back in the r8a7794 device tree. In general Renesas hardware is not documented to the extent where the relationship between IP blocks on different SoCs can be assumed although they may appear to operate the same way. Furthermore the documentation typically does not specify a version for individual IP blocks. For these reasons a convention of using the SoC name in place of a version and providing SoC-specific compat strings has been adopted. Although not universally liked this convention is used in the bindings for most drivers for Renesas hardware. The purpose of this patch is to update the Renesas R-Car DMA Controller nodes to follow this convention. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 4075a0a3d5c1..57d188c2bf6d 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -221,7 +221,7 @@ }; dmac0: dma-controller@e6700000 { - compatible = "renesas,rcar-dmac"; + compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x20000>; interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH 0 200 IRQ_TYPE_LEVEL_HIGH @@ -252,7 +252,7 @@ }; dmac1: dma-controller@e6720000 { - compatible = "renesas,rcar-dmac"; + compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac"; reg = <0 0xe6720000 0 0x20000>; interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH 0 216 IRQ_TYPE_LEVEL_HIGH From 22b160713cb6944450dad0abd18d8929f60500dc Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 17 Nov 2015 11:10:40 -0800 Subject: [PATCH 27/29] ARM: shmobile: alt: Add pfc pins to DT PFC is already enabled on the r8a7794. This adds pins for devices already enabled in DT on the r8a7794 based alt board. Based on work by Mitsuhiro Kimura and Hisashi Nakamura. Cc: Mitsuhiro Kimura Cc: Hisashi Nakamura Signed-off-by: Simon Horman Acked-by: Ulrich Hecht --- arch/arm/boot/dts/r8a7794-alt.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts index a548007b9b10..e7c94554d847 100644 --- a/arch/arm/boot/dts/r8a7794-alt.dts +++ b/arch/arm/boot/dts/r8a7794-alt.dts @@ -100,6 +100,23 @@ clock-frequency = <20000000>; }; +&pfc { + scif2_pins: serial2 { + renesas,groups = "scif2_data"; + renesas,function = "scif2"; + }; + + ether_pins: ether { + renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; + renesas,function = "eth"; + }; + + ether_b_pins: ether { + renesas,groups = "eth_link_b", "eth_mdio_b", "eth_rmii_b"; + renesas,function = "eth"; + }; +}; + &cmt0 { status = "okay"; }; From 7f81bf72c67fbd225adfc0d5f6df0f674d08d757 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Wed, 18 Nov 2015 13:51:06 +0100 Subject: [PATCH 28/29] ARM: shmobile: alt: add I2C1 DT support Defines the board-dependent part of the I2C1 device. Signed-off-by: Ulrich Hecht Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-alt.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts index e7c94554d847..88ed017495e9 100644 --- a/arch/arm/boot/dts/r8a7794-alt.dts +++ b/arch/arm/boot/dts/r8a7794-alt.dts @@ -115,6 +115,11 @@ renesas,groups = "eth_link_b", "eth_mdio_b", "eth_rmii_b"; renesas,function = "eth"; }; + + i2c1_pins: i2c1 { + renesas,groups = "i2c1"; + renesas,function = "i2c1"; + }; }; &cmt0 { @@ -134,6 +139,14 @@ }; }; +&i2c1 { + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; +}; + &scif2 { status = "okay"; }; From d537543b3948bc3bc9dede248fa455493e055457 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Wed, 18 Nov 2015 13:51:07 +0100 Subject: [PATCH 29/29] ARM: shmobile: alt: add VIN0, ADV7180 DT support Adds the device board-dependent part of the VIN0 device and its ADV7180 video decoder on I2C1, and the interconnection between them. Based on silk patch by Sergei Shtylyov. Signed-off-by: Ulrich Hecht Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-alt.dts | 34 +++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts index 88ed017495e9..fd1cfcdd65ef 100644 --- a/arch/arm/boot/dts/r8a7794-alt.dts +++ b/arch/arm/boot/dts/r8a7794-alt.dts @@ -120,6 +120,11 @@ renesas,groups = "i2c1"; renesas,function = "i2c1"; }; + + vin0_pins: vin0 { + renesas,groups = "vin0_data8", "vin0_clk"; + renesas,function = "vin0"; + }; }; &cmt0 { @@ -145,6 +150,35 @@ status = "okay"; clock-frequency = <400000>; + + composite-in@20 { + compatible = "adi,adv7180"; + reg = <0x20>; + remote = <&vin0>; + + port { + adv7180: endpoint { + bus-width = <8>; + remote-endpoint = <&vin0ep>; + }; + }; + }; +}; + +&vin0 { + status = "okay"; + pinctrl-0 = <&vin0_pins>; + pinctrl-names = "default"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + vin0ep: endpoint { + remote-endpoint = <&adv7180>; + bus-width = <8>; + }; + }; }; &scif2 {