ARM: dts: dm816x: Fix NAND device nodes
Add compatible id, GPMC register resource and interrupt resource to NAND controller nodes. The GPMC node will provide an interrupt controller for the NAND IRQs. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -6,6 +6,7 @@
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/dts-v1/;
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#include "dm816x.dtsi"
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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model = "DM8168 EVM";
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@ -85,8 +86,12 @@
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ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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linux,mtd-name= "micron,mt29f2g16aadwp";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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#address-cells = <1>;
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#size-cells = <1>;
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ti,nand-ecc-opt = "bch8";
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@ -183,6 +183,8 @@
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dma-names = "rxtx";
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gpmc,num-cs = <6>;
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gpmc,num-waitpins = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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i2c1: i2c@48028000 {
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