drm/amd/powerplay: print overdrive percentage information for smu11
Add function to get sclk or mclk overdrive percentage information for smu11. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1016,7 +1016,9 @@ static ssize_t amdgpu_get_pp_sclk_od(struct device *dev,
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struct amdgpu_device *adev = ddev->dev_private;
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uint32_t value = 0;
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if (adev->powerplay.pp_funcs->get_sclk_od)
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if (is_support_sw_smu(adev))
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value = smu_get_od_percentage(&(adev->smu), OD_SCLK);
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else if (adev->powerplay.pp_funcs->get_sclk_od)
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value = amdgpu_dpm_get_sclk_od(adev);
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return snprintf(buf, PAGE_SIZE, "%d\n", value);
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@ -1060,7 +1062,9 @@ static ssize_t amdgpu_get_pp_mclk_od(struct device *dev,
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struct amdgpu_device *adev = ddev->dev_private;
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uint32_t value = 0;
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if (adev->powerplay.pp_funcs->get_mclk_od)
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if (is_support_sw_smu(adev))
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value = smu_get_od_percentage(&(adev->smu), OD_MCLK);
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else if (adev->powerplay.pp_funcs->get_mclk_od)
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value = amdgpu_dpm_get_mclk_od(adev);
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return snprintf(buf, PAGE_SIZE, "%d\n", value);
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@ -262,6 +262,7 @@ struct pptable_funcs {
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int (*print_clk_levels)(struct smu_context *smu, enum pp_clock_type type, char *buf);
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int (*force_clk_levels)(struct smu_context *smu, enum pp_clock_type type, uint32_t mask);
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int (*set_default_od8_settings)(struct smu_context *smu);
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int (*get_od_percentage)(struct smu_context *smu, enum pp_clock_type type);
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int (*get_clock_by_type_with_latency)(struct smu_context *smu,
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enum amd_pp_clock_type type,
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struct
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@ -424,6 +425,8 @@ struct smu_funcs
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((smu)->ppt_funcs->print_clk_levels ? (smu)->ppt_funcs->print_clk_levels((smu), (type), (buf)) : 0)
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#define smu_force_clk_levels(smu, type, level) \
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((smu)->ppt_funcs->force_clk_levels ? (smu)->ppt_funcs->force_clk_levels((smu), (type), (level)) : 0)
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#define smu_get_od_percentage(smu, type) \
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((smu)->ppt_funcs->get_od_percentage ? (smu)->ppt_funcs->get_od_percentage((smu), (type)) : 0)
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#define smu_start_thermal_control(smu) \
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((smu)->funcs->start_thermal_control? (smu)->funcs->start_thermal_control((smu)) : 0)
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#define smu_read_sensor(smu, sensor, data, size) \
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@ -1120,6 +1120,42 @@ static int vega20_set_default_od8_setttings(struct smu_context *smu)
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return 0;
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}
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static int vega20_get_od_percentage(struct smu_context *smu,
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enum pp_clock_type type)
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{
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struct smu_dpm_context *smu_dpm = &smu->smu_dpm;
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struct vega20_dpm_table *dpm_table = NULL;
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struct vega20_dpm_table *golden_table = NULL;
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struct vega20_single_dpm_table *single_dpm_table;
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struct vega20_single_dpm_table *golden_dpm_table;
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int value, golden_value;
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dpm_table = smu_dpm->dpm_context;
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golden_table = smu_dpm->golden_dpm_context;
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switch (type) {
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case OD_SCLK:
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single_dpm_table = &(dpm_table->gfx_table);
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golden_dpm_table = &(golden_table->gfx_table);
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break;
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case OD_MCLK:
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single_dpm_table = &(dpm_table->mem_table);
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golden_dpm_table = &(golden_table->mem_table);
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break;
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default:
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return -EINVAL;
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break;
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}
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value = single_dpm_table->dpm_levels[single_dpm_table->count - 1].value;
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golden_value = golden_dpm_table->dpm_levels[golden_dpm_table->count - 1].value;
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value -= golden_value;
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value = DIV_ROUND_UP(value * 100, golden_value);
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return value;
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}
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static const struct pptable_funcs vega20_ppt_funcs = {
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.alloc_dpm_context = vega20_allocate_dpm_context,
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.store_powerplay_table = vega20_store_powerplay_table,
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@ -1134,6 +1170,7 @@ static const struct pptable_funcs vega20_ppt_funcs = {
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.force_clk_levels = vega20_force_clk_levels,
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.get_clock_by_type_with_latency = vega20_get_clock_by_type_with_latency,
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.set_default_od8_settings = vega20_set_default_od8_setttings,
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.get_od_percentage = vega20_get_od_percentage,
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};
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void vega20_set_ppt_funcs(struct smu_context *smu)
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