MIPS: math-emu: dsemul: Reduce `get_isa16_mode' clutter
Signed-off-by: Maciej W. Rozycki <macro@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12178/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -38,6 +38,7 @@ struct emuframe {
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*/
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*/
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int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
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int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
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{
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{
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int isa16 = get_isa16_mode(regs->cp0_epc);
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mips_instruction break_math;
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mips_instruction break_math;
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struct emuframe __user *fr;
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struct emuframe __user *fr;
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int err;
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int err;
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@ -47,7 +48,7 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
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return -1;
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return -1;
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/* microMIPS instructions */
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/* microMIPS instructions */
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if (get_isa16_mode(regs->cp0_epc)) {
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if (isa16) {
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union mips_instruction insn = { .word = ir };
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union mips_instruction insn = { .word = ir };
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/* NOP16 aka MOVE16 $0, $0 */
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/* NOP16 aka MOVE16 $0, $0 */
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@ -81,7 +82,7 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
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* multiprocessor support. For Linux we use a BREAK 514
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* multiprocessor support. For Linux we use a BREAK 514
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* instruction causing a breakpoint exception.
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* instruction causing a breakpoint exception.
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*/
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*/
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break_math = BREAK_MATH(get_isa16_mode(regs->cp0_epc));
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break_math = BREAK_MATH(isa16);
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/* Ensure that the two instructions are in the same cache line */
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/* Ensure that the two instructions are in the same cache line */
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fr = (struct emuframe __user *)
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fr = (struct emuframe __user *)
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@ -91,7 +92,7 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
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if (unlikely(!access_ok(VERIFY_WRITE, fr, sizeof(struct emuframe))))
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if (unlikely(!access_ok(VERIFY_WRITE, fr, sizeof(struct emuframe))))
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return SIGBUS;
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return SIGBUS;
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if (get_isa16_mode(regs->cp0_epc)) {
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if (isa16) {
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err = __put_user(ir >> 16,
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err = __put_user(ir >> 16,
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(u16 __user *)(&fr->emul));
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(u16 __user *)(&fr->emul));
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err |= __put_user(ir & 0xffff,
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err |= __put_user(ir & 0xffff,
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@ -113,8 +114,7 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
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return SIGBUS;
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return SIGBUS;
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}
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}
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regs->cp0_epc = ((unsigned long) &fr->emul) |
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regs->cp0_epc = (unsigned long)&fr->emul | isa16;
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get_isa16_mode(regs->cp0_epc);
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flush_cache_sigtramp((unsigned long)&fr->emul);
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flush_cache_sigtramp((unsigned long)&fr->emul);
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@ -123,6 +123,7 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
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int do_dsemulret(struct pt_regs *xcp)
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int do_dsemulret(struct pt_regs *xcp)
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{
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{
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int isa16 = get_isa16_mode(xcp->cp0_epc);
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struct emuframe __user *fr;
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struct emuframe __user *fr;
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unsigned long epc;
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unsigned long epc;
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u32 insn, cookie;
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u32 insn, cookie;
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@ -145,7 +146,7 @@ int do_dsemulret(struct pt_regs *xcp)
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* - Is the instruction pointed to by the EPC an BREAK_MATH?
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* - Is the instruction pointed to by the EPC an BREAK_MATH?
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* - Is the following memory word the BD_COOKIE?
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* - Is the following memory word the BD_COOKIE?
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*/
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*/
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if (get_isa16_mode(xcp->cp0_epc)) {
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if (isa16) {
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err = __get_user(instr[0],
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err = __get_user(instr[0],
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(u16 __user *)(&fr->badinst));
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(u16 __user *)(&fr->badinst));
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err |= __get_user(instr[1],
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err |= __get_user(instr[1],
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@ -156,8 +157,8 @@ int do_dsemulret(struct pt_regs *xcp)
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}
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}
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err |= __get_user(cookie, &fr->cookie);
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err |= __get_user(cookie, &fr->cookie);
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if (unlikely(err || insn != BREAK_MATH(get_isa16_mode(xcp->cp0_epc)) ||
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if (unlikely(err ||
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cookie != BD_COOKIE)) {
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insn != BREAK_MATH(isa16) || cookie != BD_COOKIE)) {
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MIPS_FPU_EMU_INC_STATS(errors);
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MIPS_FPU_EMU_INC_STATS(errors);
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return 0;
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return 0;
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}
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}
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