mmc: sh_mmcif: revision-specific CLK_CTRL2 handling
Some newer MMCIF IP revisions contain a CE_CLK_CTRL2 register, that has to be set for proper operation. Support for this feature is added in a way to preserve the current behaviour by default, i.e. when it is not enabled in platform data. Patch is based on work by Nobuyuki HIRAI. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Chris Ball <cjb@laptop.org>
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committed by
Chris Ball
parent
967bcb7717
commit
6d6fd36742
@@ -247,6 +247,7 @@ struct sh_mmcif_host {
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bool power;
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bool card_present;
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bool ccs_enable; /* Command Completion Signal support */
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bool clk_ctrl2_enable;
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struct mutex thread_lock;
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/* DMA support */
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@@ -497,6 +498,8 @@ static void sh_mmcif_sync_reset(struct sh_mmcif_host *host)
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sh_mmcif_writel(host->addr, MMCIF_CE_VERSION, SOFT_RST_OFF);
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if (host->ccs_enable)
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tmp |= SCCSTO_29;
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if (host->clk_ctrl2_enable)
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sh_mmcif_writel(host->addr, MMCIF_CE_CLK_CTRL2, 0x0F0F0000);
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sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, tmp |
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SRSPTO_256 | SRBSYTO_29 | SRWDTO_29);
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/* byte swap on */
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@@ -1398,6 +1401,7 @@ static int sh_mmcif_probe(struct platform_device *pdev)
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host->addr = reg;
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host->timeout = msecs_to_jiffies(1000);
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host->ccs_enable = !pd || !pd->ccs_unsupported;
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host->clk_ctrl2_enable = pd && pd->clk_ctrl2_present;
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host->pd = pdev;
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