forked from Minki/linux
spi: pxa2xx: Extract read_SSSR_bits() helper
There are few places that repeat the logic of "read some bits from SSSR". Extract read_SSSR_bits() helper to deduplicate that. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210510124134.24638-13-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
42c80cd439
commit
6d380132ea
@ -34,11 +34,8 @@ static void pxa2xx_spi_dma_transfer_complete(struct driver_data *drv_data,
|
||||
* might not know about the error yet. So we re-check the
|
||||
* ROR bit here before we clear the status register.
|
||||
*/
|
||||
if (!error) {
|
||||
u32 status = pxa2xx_spi_read(drv_data, SSSR)
|
||||
& drv_data->mask_sr;
|
||||
error = status & SSSR_ROR;
|
||||
}
|
||||
if (!error)
|
||||
error = read_SSSR_bits(drv_data, drv_data->mask_sr) & SSSR_ROR;
|
||||
|
||||
/* Clear status & disable interrupts */
|
||||
clear_SSCR1_bits(drv_data, drv_data->dma_cr1);
|
||||
@ -119,7 +116,7 @@ irqreturn_t pxa2xx_spi_dma_transfer(struct driver_data *drv_data)
|
||||
{
|
||||
u32 status;
|
||||
|
||||
status = pxa2xx_spi_read(drv_data, SSSR) & drv_data->mask_sr;
|
||||
status = read_SSSR_bits(drv_data, drv_data->mask_sr);
|
||||
if (status & SSSR_ROR) {
|
||||
dev_err(drv_data->ssp->dev, "FIFO overrun\n");
|
||||
|
||||
|
@ -247,7 +247,7 @@ static bool pxa2xx_spi_txfifo_full(const struct driver_data *drv_data)
|
||||
break;
|
||||
}
|
||||
|
||||
return (pxa2xx_spi_read(drv_data, SSSR) & mask) == mask;
|
||||
return read_SSSR_bits(drv_data, mask) == mask;
|
||||
}
|
||||
|
||||
static void pxa2xx_spi_clear_rx_thre(const struct driver_data *drv_data,
|
||||
@ -488,7 +488,7 @@ int pxa2xx_spi_flush(struct driver_data *drv_data)
|
||||
unsigned long limit = loops_per_jiffy << 1;
|
||||
|
||||
do {
|
||||
while (pxa2xx_spi_read(drv_data, SSSR) & SSSR_RNE)
|
||||
while (read_SSSR_bits(drv_data, SSSR_RNE))
|
||||
pxa2xx_spi_read(drv_data, SSDR);
|
||||
} while ((pxa2xx_spi_read(drv_data, SSSR) & SSSR_BSY) && --limit);
|
||||
write_SSSR_CS(drv_data, SSSR_ROR);
|
||||
@ -523,8 +523,7 @@ static int null_reader(struct driver_data *drv_data)
|
||||
{
|
||||
u8 n_bytes = drv_data->n_bytes;
|
||||
|
||||
while ((pxa2xx_spi_read(drv_data, SSSR) & SSSR_RNE)
|
||||
&& (drv_data->rx < drv_data->rx_end)) {
|
||||
while (read_SSSR_bits(drv_data, SSSR_RNE) && drv_data->rx < drv_data->rx_end) {
|
||||
pxa2xx_spi_read(drv_data, SSDR);
|
||||
drv_data->rx += n_bytes;
|
||||
}
|
||||
@ -546,8 +545,7 @@ static int u8_writer(struct driver_data *drv_data)
|
||||
|
||||
static int u8_reader(struct driver_data *drv_data)
|
||||
{
|
||||
while ((pxa2xx_spi_read(drv_data, SSSR) & SSSR_RNE)
|
||||
&& (drv_data->rx < drv_data->rx_end)) {
|
||||
while (read_SSSR_bits(drv_data, SSSR_RNE) && drv_data->rx < drv_data->rx_end) {
|
||||
*(u8 *)(drv_data->rx) = pxa2xx_spi_read(drv_data, SSDR);
|
||||
++drv_data->rx;
|
||||
}
|
||||
@ -569,8 +567,7 @@ static int u16_writer(struct driver_data *drv_data)
|
||||
|
||||
static int u16_reader(struct driver_data *drv_data)
|
||||
{
|
||||
while ((pxa2xx_spi_read(drv_data, SSSR) & SSSR_RNE)
|
||||
&& (drv_data->rx < drv_data->rx_end)) {
|
||||
while (read_SSSR_bits(drv_data, SSSR_RNE) && drv_data->rx < drv_data->rx_end) {
|
||||
*(u16 *)(drv_data->rx) = pxa2xx_spi_read(drv_data, SSDR);
|
||||
drv_data->rx += 2;
|
||||
}
|
||||
@ -592,8 +589,7 @@ static int u32_writer(struct driver_data *drv_data)
|
||||
|
||||
static int u32_reader(struct driver_data *drv_data)
|
||||
{
|
||||
while ((pxa2xx_spi_read(drv_data, SSSR) & SSSR_RNE)
|
||||
&& (drv_data->rx < drv_data->rx_end)) {
|
||||
while (read_SSSR_bits(drv_data, SSSR_RNE) && drv_data->rx < drv_data->rx_end) {
|
||||
*(u32 *)(drv_data->rx) = pxa2xx_spi_read(drv_data, SSDR);
|
||||
drv_data->rx += 4;
|
||||
}
|
||||
@ -655,10 +651,11 @@ static void int_transfer_complete(struct driver_data *drv_data)
|
||||
|
||||
static irqreturn_t interrupt_transfer(struct driver_data *drv_data)
|
||||
{
|
||||
u32 irq_mask = (pxa2xx_spi_read(drv_data, SSCR1) & SSCR1_TIE) ?
|
||||
drv_data->mask_sr : drv_data->mask_sr & ~SSSR_TFS;
|
||||
u32 irq_status;
|
||||
|
||||
u32 irq_status = pxa2xx_spi_read(drv_data, SSSR) & irq_mask;
|
||||
irq_status = read_SSSR_bits(drv_data, drv_data->mask_sr);
|
||||
if (!(pxa2xx_spi_read(drv_data, SSCR1) & SSCR1_TIE))
|
||||
irq_status &= ~SSSR_TFS;
|
||||
|
||||
if (irq_status & SSSR_ROR) {
|
||||
int_error_stop(drv_data, "interrupt_transfer: fifo overrun", -EIO);
|
||||
@ -1110,8 +1107,7 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller,
|
||||
pxa_ssp_enable(drv_data->ssp);
|
||||
|
||||
if (is_mmp2_ssp(drv_data)) {
|
||||
u8 tx_level = (pxa2xx_spi_read(drv_data, SSSR)
|
||||
& SSSR_TFL_MASK) >> 8;
|
||||
u8 tx_level = read_SSSR_bits(drv_data, SSSR_TFL_MASK) >> 8;
|
||||
|
||||
if (tx_level) {
|
||||
/* On MMP2, flipping SSE doesn't to empty TXFIFO. */
|
||||
|
@ -110,11 +110,16 @@ static inline void clear_SSCR1_bits(const struct driver_data *drv_data, u32 bits
|
||||
pxa2xx_spi_write(drv_data, SSCR1, pxa2xx_spi_read(drv_data, SSCR1) & ~bits);
|
||||
}
|
||||
|
||||
static inline u32 read_SSSR_bits(const struct driver_data *drv_data, u32 bits)
|
||||
{
|
||||
return pxa2xx_spi_read(drv_data, SSSR) & bits;
|
||||
}
|
||||
|
||||
static inline void write_SSSR_CS(struct driver_data *drv_data, u32 val)
|
||||
{
|
||||
if (drv_data->ssp_type == CE4100_SSP ||
|
||||
drv_data->ssp_type == QUARK_X1000_SSP)
|
||||
val |= pxa2xx_spi_read(drv_data, SSSR) & SSSR_ALT_FRM_MASK;
|
||||
val |= read_SSSR_bits(drv_data, SSSR_ALT_FRM_MASK);
|
||||
|
||||
pxa2xx_spi_write(drv_data, SSSR, val);
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user