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scsi: ufs: make ufshcd_get_lists_status() register operation obvious

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It could be just cmp 0xe instead of >>1 and cmp 0x7, with readable code.

Signed-off-by: Tomohiro Kusumi <tkusumi@tuxera.com>
Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Tomohiro Kusumi 2017-04-26 20:28:58 +03:00 committed by Martin K. Petersen
parent d7e2ddd5e5
commit 6cf161150d
2 changed files with 5 additions and 10 deletions
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11
drivers/scsi/ufs/ufshcd.c
View File

@ -673,16 +673,7 @@ static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
*/ */
static inline int ufshcd_get_lists_status(u32 reg) static inline int ufshcd_get_lists_status(u32 reg)
{ {
/* return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
* The mask 0xFF is for the following HCS register bits
* Bit Description
* 0 Device Present
* 1 UTRLRDY
* 2 UTMRLRDY
* 3 UCRDY
* 4-7 reserved
*/
return ((reg & 0xFF) >> 1) ^ 0x07;
} }
/** /**

4
drivers/scsi/ufs/ufshci.h
View File

@ -160,6 +160,10 @@ enum {
#define DEVICE_ERROR_INDICATOR UFS_BIT(5) #define DEVICE_ERROR_INDICATOR UFS_BIT(5)
#define UIC_POWER_MODE_CHANGE_REQ_STATUS_MASK UFS_MASK(0x7, 8) #define UIC_POWER_MODE_CHANGE_REQ_STATUS_MASK UFS_MASK(0x7, 8)
#define UFSHCD_STATUS_READY (UTP_TRANSFER_REQ_LIST_READY |\
UTP_TASK_REQ_LIST_READY |\
UIC_COMMAND_READY)
enum { enum {
PWR_OK = 0x0, PWR_OK = 0x0,
PWR_LOCAL = 0x01, PWR_LOCAL = 0x01,