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Merge 3.17-rc6 into usb-next

Browse Source 
We want the USB fixes in this branch as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Greg Kroah-Hartman 2014-09-22 06:46:16 -07:00
commit 6ca01a1b45
167 changed files with 1078 additions and 612 deletions
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4
Documentation/devicetree/bindings/input/atmel,maxtouch.txt
View File

@ -11,10 +11,6 @@ Required properties:
Optional properties for main touchpad device:
- linux,gpio-keymap: An array of up to 4 entries indicating the Linux
keycode generated by each GPIO. Linux keycodes are defined in
<dt-bindings/input/input.h>.
- linux,gpio-keymap: When enabled, the SPT_GPIOPWN_T19 object sends messages
on GPIO bit changes. An array of up to 8 entries can be provided
indicating the Linux keycode mapped to each bit of the status byte,

2
Documentation/devicetree/bindings/sound/rockchip-i2s.txt
View File

@ -31,7 +31,7 @@ i2s@ff890000 {
#address-cells = <1>;
#size-cells = <0>;
dmas = <&pdma1 0>, <&pdma1 1>;
dma-names = "rx", "tx";
dma-names = "tx", "rx";
clock-names = "i2s_hclk", "i2s_clk";
clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
};

8
Documentation/devicetree/bindings/spi/spi-rockchip.txt
View File

@ -16,11 +16,15 @@ Required Properties:
- clocks: Must contain an entry for each entry in clock-names.
- clock-names: Shall be "spiclk" for the transfer-clock, and "apb_pclk" for
the peripheral clock.
- #address-cells: should be 1.
- #size-cells: should be 0.
Optional Properties:
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
Documentation/devicetree/bindings/dma/dma.txt
- dma-names: DMA request names should include "tx" and "rx" if present.
- #address-cells: should be 1.
- #size-cells: should be 0.
Example:

2
MAINTAINERS
View File

@ -6878,7 +6878,7 @@ F: arch/x86/kernel/quirks.c
PCI DRIVER FOR IMX6
M: Richard Zhu <r65037@freescale.com>
M: Shawn Guo <shawn.guo@freescale.com>
M: Lucas Stach <l.stach@pengutronix.de>
L: linux-pci@vger.kernel.org
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained

2
Makefile
View File

@ -1,7 +1,7 @@
VERSION = 3
PATCHLEVEL = 17
SUBLEVEL = 0
EXTRAVERSION = -rc5
EXTRAVERSION = -rc6
NAME = Shuffling Zombie Juror
# *DOCUMENTATION*

62
arch/arm/include/asm/tls.h
View File

@ -1,6 +1,9 @@
#ifndef __ASMARM_TLS_H
#define __ASMARM_TLS_H
#include <linux/compiler.h>
#include <asm/thread_info.h>
#ifdef __ASSEMBLY__
#include <asm/asm-offsets.h>
.macro switch_tls_none, base, tp, tpuser, tmp1, tmp2
@ -50,6 +53,47 @@
#endif
#ifndef __ASSEMBLY__
static inline void set_tls(unsigned long val)
{
struct thread_info *thread;
thread = current_thread_info();
thread->tp_value[0] = val;
/*
* This code runs with preemption enabled and therefore must
* be reentrant with respect to switch_tls.
*
* We need to ensure ordering between the shadow state and the
* hardware state, so that we don't corrupt the hardware state
* with a stale shadow state during context switch.
*
* If we're preempted here, switch_tls will load TPIDRURO from
* thread_info upon resuming execution and the following mcr
* is merely redundant.
*/
barrier();
if (!tls_emu) {
if (has_tls_reg) {
asm("mcr p15, 0, %0, c13, c0, 3"
: : "r" (val));
} else {
/*
* User space must never try to access this
* directly. Expect your app to break
* eventually if you do so. The user helper
* at 0xffff0fe0 must be used instead. (see
* entry-armv.S for details)
*/
*((unsigned int *)0xffff0ff0) = val;
}
}
}
static inline unsigned long get_tpuser(void)
{
unsigned long reg = 0;
@ -59,5 +103,23 @@ static inline unsigned long get_tpuser(void)
return reg;
}
static inline void set_tpuser(unsigned long val)
{
/* Since TPIDRURW is fully context-switched (unlike TPIDRURO),
* we need not update thread_info.
*/
if (has_tls_reg && !tls_emu) {
asm("mcr p15, 0, %0, c13, c0, 2"
: : "r" (val));
}
}
static inline void flush_tls(void)
{
set_tls(0);
set_tpuser(0);
}
#endif
#endif /* __ASMARM_TLS_H */

48
arch/arm/include/asm/uaccess.h
View File

@ -107,8 +107,11 @@ static inline void set_fs(mm_segment_t fs)
extern int __get_user_1(void *);
extern int __get_user_2(void *);
extern int __get_user_4(void *);
extern int __get_user_lo8(void *);
extern int __get_user_32t_8(void *);
extern int __get_user_8(void *);
extern int __get_user_64t_1(void *);
extern int __get_user_64t_2(void *);
extern int __get_user_64t_4(void *);
#define __GUP_CLOBBER_1 "lr", "cc"
#ifdef CONFIG_CPU_USE_DOMAINS
@ -117,7 +120,7 @@ extern int __get_user_8(void *);
#define __GUP_CLOBBER_2 "lr", "cc"
#endif
#define __GUP_CLOBBER_4 "lr", "cc"
#define __GUP_CLOBBER_lo8 "lr", "cc"
#define __GUP_CLOBBER_32t_8 "lr", "cc"
#define __GUP_CLOBBER_8 "lr", "cc"
#define __get_user_x(__r2,__p,__e,__l,__s) \
@ -131,12 +134,30 @@ extern int __get_user_8(void *);
/* narrowing a double-word get into a single 32bit word register: */
#ifdef __ARMEB__
#define __get_user_xb(__r2, __p, __e, __l, __s) \
__get_user_x(__r2, __p, __e, __l, lo8)
#define __get_user_x_32t(__r2, __p, __e, __l, __s) \
__get_user_x(__r2, __p, __e, __l, 32t_8)
#else
#define __get_user_xb __get_user_x
#define __get_user_x_32t __get_user_x
#endif
/*
* storing result into proper least significant word of 64bit target var,
* different only for big endian case where 64 bit __r2 lsw is r3:
*/
#ifdef __ARMEB__
#define __get_user_x_64t(__r2, __p, __e, __l, __s) \
__asm__ __volatile__ ( \
__asmeq("%0", "r0") __asmeq("%1", "r2") \
__asmeq("%3", "r1") \
"bl __get_user_64t_" #__s \
: "=&r" (__e), "=r" (__r2) \
: "0" (__p), "r" (__l) \
: __GUP_CLOBBER_##__s)
#else
#define __get_user_x_64t __get_user_x
#endif
#define __get_user_check(x,p) \
({ \
unsigned long __limit = current_thread_info()->addr_limit - 1; \
@ -146,17 +167,26 @@ extern int __get_user_8(void *);
register int __e asm("r0"); \
switch (sizeof(*(__p))) { \
case 1: \
__get_user_x(__r2, __p, __e, __l, 1); \
if (sizeof((x)) >= 8) \
__get_user_x_64t(__r2, __p, __e, __l, 1); \
else \
__get_user_x(__r2, __p, __e, __l, 1); \
break; \
case 2: \
__get_user_x(__r2, __p, __e, __l, 2); \
if (sizeof((x)) >= 8) \
__get_user_x_64t(__r2, __p, __e, __l, 2); \
else \
__get_user_x(__r2, __p, __e, __l, 2); \
break; \
case 4: \
__get_user_x(__r2, __p, __e, __l, 4); \
if (sizeof((x)) >= 8) \
__get_user_x_64t(__r2, __p, __e, __l, 4); \
else \
__get_user_x(__r2, __p, __e, __l, 4); \
break; \
case 8: \
if (sizeof((x)) < 8) \
__get_user_xb(__r2, __p, __e, __l, 4); \
__get_user_x_32t(__r2, __p, __e, __l, 4); \
else \
__get_user_x(__r2, __p, __e, __l, 8); \
break; \

8
arch/arm/kernel/armksyms.c
View File

@ -98,6 +98,14 @@ EXPORT_SYMBOL(__clear_user);
EXPORT_SYMBOL(__get_user_1);
EXPORT_SYMBOL(__get_user_2);
EXPORT_SYMBOL(__get_user_4);
EXPORT_SYMBOL(__get_user_8);
#ifdef __ARMEB__
EXPORT_SYMBOL(__get_user_64t_1);
EXPORT_SYMBOL(__get_user_64t_2);
EXPORT_SYMBOL(__get_user_64t_4);
EXPORT_SYMBOL(__get_user_32t_8);
#endif
EXPORT_SYMBOL(__put_user_1);
EXPORT_SYMBOL(__put_user_2);

2
arch/arm/kernel/irq.c
View File

@ -175,7 +175,7 @@ static bool migrate_one_irq(struct irq_desc *desc)
c = irq_data_get_irq_chip(d);
if (!c->irq_set_affinity)
pr_debug("IRQ%u: unable to set affinity\n", d->irq);
else if (c->irq_set_affinity(d, affinity, true) == IRQ_SET_MASK_OK && ret)
else if (c->irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK && ret)
cpumask_copy(d->affinity, affinity);
return ret;

14
arch/arm/kernel/perf_event_cpu.c
View File

@ -76,21 +76,15 @@ static struct pmu_hw_events *cpu_pmu_get_cpu_events(void)
static void cpu_pmu_enable_percpu_irq(void *data)
{
struct arm_pmu *cpu_pmu = data;
struct platform_device *pmu_device = cpu_pmu->plat_device;
int irq = platform_get_irq(pmu_device, 0);
int irq = *(int *)data;
enable_percpu_irq(irq, IRQ_TYPE_NONE);
cpumask_set_cpu(smp_processor_id(), &cpu_pmu->active_irqs);
}
static void cpu_pmu_disable_percpu_irq(void *data)
{
struct arm_pmu *cpu_pmu = data;
struct platform_device *pmu_device = cpu_pmu->plat_device;
int irq = platform_get_irq(pmu_device, 0);
int irq = *(int *)data;
cpumask_clear_cpu(smp_processor_id(), &cpu_pmu->active_irqs);
disable_percpu_irq(irq);
}
@ -103,7 +97,7 @@ static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
irq = platform_get_irq(pmu_device, 0);
if (irq >= 0 && irq_is_percpu(irq)) {
on_each_cpu(cpu_pmu_disable_percpu_irq, cpu_pmu, 1);
on_each_cpu(cpu_pmu_disable_percpu_irq, &irq, 1);
free_percpu_irq(irq, &percpu_pmu);
} else {
for (i = 0; i < irqs; ++i) {
@ -138,7 +132,7 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
irq);
return err;
}
on_each_cpu(cpu_pmu_enable_percpu_irq, cpu_pmu, 1);
on_each_cpu(cpu_pmu_enable_percpu_irq, &irq, 1);
} else {
for (i = 0; i < irqs; ++i) {
err = 0;

2
arch/arm/kernel/process.c
View File

@ -334,6 +334,8 @@ void flush_thread(void)
memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
memset(&thread->fpstate, 0, sizeof(union fp_state));
flush_tls();
thread_notify(THREAD_NOTIFY_FLUSH, thread);
}

15
arch/arm/kernel/swp_emulate.c
View File

@ -142,14 +142,6 @@ static int emulate_swpX(unsigned int address, unsigned int *data,
while (1) {
unsigned long temp;
/*
* Barrier required between accessing protected resource and
* releasing a lock for it. Legacy code might not have done
* this, and we cannot determine that this is not the case
* being emulated, so insert always.
*/
smp_mb();
if (type == TYPE_SWPB)
__user_swpb_asm(*data, address, res, temp);
else
@ -162,13 +154,6 @@ static int emulate_swpX(unsigned int address, unsigned int *data,
}
if (res == 0) {
/*
* Barrier also required between acquiring a lock for a
* protected resource and accessing the resource. Inserted for
* same reason as above.
*/
smp_mb();
if (type == TYPE_SWPB)
swpbcounter++;
else

2
arch/arm/kernel/thumbee.c
View File

@ -45,7 +45,7 @@ static int thumbee_notifier(struct notifier_block *self, unsigned long cmd, void
switch (cmd) {
case THREAD_NOTIFY_FLUSH:
thread->thumbee_state = 0;
teehbr_write(0);
break;
case THREAD_NOTIFY_SWITCH:
current_thread_info()->thumbee_state = teehbr_read();

17
arch/arm/kernel/traps.c
View File

@ -581,7 +581,6 @@ do_cache_op(unsigned long start, unsigned long end, int flags)
#define NR(x) ((__ARM_NR_##x) - __ARM_NR_BASE)
asmlinkage int arm_syscall(int no, struct pt_regs *regs)
{
struct thread_info *thread = current_thread_info();
siginfo_t info;
if ((no >> 16) != (__ARM_NR_BASE>> 16))
@ -632,21 +631,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
return regs->ARM_r0;
case NR(set_tls):
thread->tp_value[0] = regs->ARM_r0;
if (tls_emu)
return 0;
if (has_tls_reg) {
asm ("mcr p15, 0, %0, c13, c0, 3"
: : "r" (regs->ARM_r0));
} else {
/*
* User space must never try to access this directly.
* Expect your app to break eventually if you do so.
* The user helper at 0xffff0fe0 must be used instead.
* (see entry-armv.S for details)
*/
*((unsigned int *)0xffff0ff0) = regs->ARM_r0;
}
set_tls(regs->ARM_r0);
return 0;
#ifdef CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG

38
arch/arm/lib/getuser.S
View File

@ -80,7 +80,7 @@ ENTRY(__get_user_8)
ENDPROC(__get_user_8)
#ifdef __ARMEB__
ENTRY(__get_user_lo8)
ENTRY(__get_user_32t_8)
check_uaccess r0, 8, r1, r2, __get_user_bad
#ifdef CONFIG_CPU_USE_DOMAINS
add r0, r0, #4
@ -90,7 +90,37 @@ ENTRY(__get_user_lo8)
#endif
mov r0, #0
ret lr
ENDPROC(__get_user_lo8)
ENDPROC(__get_user_32t_8)
ENTRY(__get_user_64t_1)
check_uaccess r0, 1, r1, r2, __get_user_bad8
8: TUSER(ldrb) r3, [r0]
mov r0, #0
ret lr
ENDPROC(__get_user_64t_1)
ENTRY(__get_user_64t_2)
check_uaccess r0, 2, r1, r2, __get_user_bad8
#ifdef CONFIG_CPU_USE_DOMAINS
rb .req ip
9: ldrbt r3, [r0], #1
10: ldrbt rb, [r0], #0
#else
rb .req r0
9: ldrb r3, [r0]
10: ldrb rb, [r0, #1]
#endif
orr r3, rb, r3, lsl #8
mov r0, #0
ret lr
ENDPROC(__get_user_64t_2)
ENTRY(__get_user_64t_4)
check_uaccess r0, 4, r1, r2, __get_user_bad8
11: TUSER(ldr) r3, [r0]
mov r0, #0
ret lr
ENDPROC(__get_user_64t_4)
#endif
__get_user_bad8:
@ -111,5 +141,9 @@ ENDPROC(__get_user_bad8)
.long 6b, __get_user_bad8
#ifdef __ARMEB__
.long 7b, __get_user_bad
.long 8b, __get_user_bad8
.long 9b, __get_user_bad8
.long 10b, __get_user_bad8
.long 11b, __get_user_bad8
#endif
.popsection

1
arch/arm/mm/proc-v7-3level.S
View File

@ -146,7 +146,6 @@ ENDPROC(cpu_v7_set_pte_ext)
mov \tmp, \ttbr1, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
mov \ttbr1, \ttbr1, lsl #ARCH_PGD_SHIFT @ lower bits
addls \ttbr1, \ttbr1, #TTBR1_OFFSET
adcls \tmp, \tmp, #0
mcrr p15, 1, \ttbr1, \tmp, c2 @ load TTBR1
mov \tmp, \ttbr0, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
mov \ttbr0, \ttbr0, lsl #ARCH_PGD_SHIFT @ lower bits

3
arch/arm64/mm/init.c
View File

@ -149,8 +149,7 @@ void __init arm64_memblock_init(void)
memblock_reserve(__virt_to_phys(initrd_start), initrd_end - initrd_start);
#endif
if (!efi_enabled(EFI_MEMMAP))
early_init_fdt_scan_reserved_mem();
early_init_fdt_scan_reserved_mem();
/* 4GB maximum for 32-bit only capable devices */
if (IS_ENABLED(CONFIG_ZONE_DMA))

2
arch/ia64/include/uapi/asm/unistd.h
View File

@ -329,6 +329,6 @@
#define __NR_sched_getattr 1337
#define __NR_renameat2 1338
#define __NR_getrandom 1339
#define __NR_memfd_create 1339
#define __NR_memfd_create 1340
#endif /* _UAPI_ASM_IA64_UNISTD_H */

24
arch/ia64/pci/fixup.c
View File

@ -38,27 +38,6 @@ static void pci_fixup_video(struct pci_dev *pdev)
return;
/* Maybe, this machine supports legacy memory map. */
if (!vga_default_device()) {
resource_size_t start, end;
int i;
/* Does firmware framebuffer belong to us? */
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
continue;
start = pci_resource_start(pdev, i);
end = pci_resource_end(pdev, i);
if (!start || !end)
continue;
if (screen_info.lfb_base >= start &&
(screen_info.lfb_base + screen_info.lfb_size) < end)
vga_set_default_device(pdev);
}
}
/* Is VGA routed to us? */
bus = pdev->bus;
while (bus) {
@ -83,8 +62,7 @@ static void pci_fixup_video(struct pci_dev *pdev)
pci_read_config_word(pdev, PCI_COMMAND, &config);
if (config & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {
pdev->resource[PCI_ROM_RESOURCE].flags |= IORESOURCE_ROM_SHADOW;
dev_printk(KERN_DEBUG, &pdev->dev, "Boot video device\n");
vga_set_default_device(pdev);
dev_printk(KERN_DEBUG, &pdev->dev, "Video device with shadowed ROM\n");
}
}
}

3
arch/mips/Kconfig
View File

@ -546,6 +546,7 @@ config SGI_IP28
# select SYS_HAS_EARLY_PRINTK
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select MIPS_L1_CACHE_SHIFT_7
help
This is the SGI Indigo2 with R10000 processor. To compile a Linux
kernel that runs on these, say Y here.
@ -2029,7 +2030,9 @@ config MIPS_CMP
bool "MIPS CMP framework support (DEPRECATED)"
depends on SYS_SUPPORTS_MIPS_CMP
select MIPS_GIC_IPI
select SMP
select SYNC_R4K
select SYS_SUPPORTS_SMP
select WEAK_ORDERING
default n
help

11
arch/mips/Makefile
View File

@ -113,7 +113,16 @@ predef-le += -DMIPSEL -D_MIPSEL -D__MIPSEL -D__MIPSEL__
cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB $(undef-all) $(predef-be))
cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL $(undef-all) $(predef-le))
cflags-$(CONFIG_CPU_HAS_SMARTMIPS) += $(call cc-option,-msmartmips)
# For smartmips configurations, there are hundreds of warnings due to ISA overrides
# in assembly and header files. smartmips is only supported for MIPS32r1 onwards
# and there is no support for 64-bit. Various '.set mips2' or '.set mips3' or
# similar directives in the kernel will spam the build logs with the following warnings:
# Warning: the `smartmips' extension requires MIPS32 revision 1 or greater
# or
# Warning: the 64-bit MIPS architecture does not support the `smartmips' extension
# Pass -Wa,--no-warn to disable all assembler warnings until the kernel code has
# been fixed properly.
cflags-$(CONFIG_CPU_HAS_SMARTMIPS) += $(call cc-option,-msmartmips) -Wa,--no-warn
cflags-$(CONFIG_CPU_MICROMIPS) += $(call cc-option,-mmicromips)
cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \

4
arch/mips/bcm63xx/irq.c
View File

@ -434,7 +434,7 @@ static void bcm63xx_init_irq(void)
irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
irq_stat_addr[1] = 0;
irq_stat_addr[1] = 0;
irq_mask_addr[1] = 0;
irq_bits = 32;
ext_irq_count = 4;
ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
@ -443,7 +443,7 @@ static void bcm63xx_init_irq(void)
irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
irq_stat_addr[1] += PERF_IRQSTAT_6328_REG(1);
irq_stat_addr[1] += PERF_IRQMASK_6328_REG(1);
irq_mask_addr[1] += PERF_IRQMASK_6328_REG(1);
irq_bits = 64;
ext_irq_count = 4;
is_ext_irq_cascaded = 1;

1
arch/mips/boot/compressed/decompress.c
View File

@ -13,6 +13,7 @@
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/addrspace.h>

18
arch/mips/include/asm/cop2.h
View File

@ -16,8 +16,8 @@
extern void octeon_cop2_save(struct octeon_cop2_state *);
extern void octeon_cop2_restore(struct octeon_cop2_state *);
#define cop2_save(r) octeon_cop2_save(r)
#define cop2_restore(r) octeon_cop2_restore(r)
#define cop2_save(r) octeon_cop2_save(&(r)->thread.cp2)
#define cop2_restore(r) octeon_cop2_restore(&(r)->thread.cp2)
#define cop2_present 1
#define cop2_lazy_restore 1
@ -26,26 +26,26 @@ extern void octeon_cop2_restore(struct octeon_cop2_state *);
extern void nlm_cop2_save(struct nlm_cop2_state *);
extern void nlm_cop2_restore(struct nlm_cop2_state *);
#define cop2_save(r) nlm_cop2_save(r)
#define cop2_restore(r) nlm_cop2_restore(r)
#define cop2_save(r) nlm_cop2_save(&(r)->thread.cp2)
#define cop2_restore(r) nlm_cop2_restore(&(r)->thread.cp2)
#define cop2_present 1
#define cop2_lazy_restore 0
#elif defined(CONFIG_CPU_LOONGSON3)
#define cop2_save(r)
#define cop2_restore(r)
#define cop2_present 1
#define cop2_lazy_restore 1
#define cop2_save(r) do { (r); } while (0)
#define cop2_restore(r) do { (r); } while (0)
#else
#define cop2_present 0
#define cop2_lazy_restore 0
#define cop2_save(r)
#define cop2_restore(r)
#define cop2_save(r) do { (r); } while (0)
#define cop2_restore(r) do { (r); } while (0)
#endif
enum cu2_ops {

7
arch/mips/include/asm/mach-ip28/spaces.h
View File

@ -11,15 +11,8 @@
#ifndef _ASM_MACH_IP28_SPACES_H
#define _ASM_MACH_IP28_SPACES_H
#define CAC_BASE _AC(0xa800000000000000, UL)
#define HIGHMEM_START (~0UL)
#define PHYS_OFFSET _AC(0x20000000, UL)
#define UNCAC_BASE _AC(0xc0000000, UL) /* 0xa0000000 + PHYS_OFFSET */
#define IO_BASE UNCAC_BASE
#include <asm/mach-generic/spaces.h>
#endif /* _ASM_MACH_IP28_SPACES_H */

5
arch/mips/include/asm/page.h
View File

@ -37,7 +37,7 @@
/*
* This is used for calculating the real page sizes
* for FTLB or VTLB + FTLB confugrations.
* for FTLB or VTLB + FTLB configurations.
*/
static inline unsigned int page_size_ftlb(unsigned int mmuextdef)
{
@ -223,7 +223,8 @@ static inline int pfn_valid(unsigned long pfn)
#endif
#define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys(kaddr)))
#define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys((void *) \
(kaddr))))
extern int __virt_addr_valid(const volatile void *kaddr);
#define virt_addr_valid(kaddr) \

5
arch/mips/include/asm/smp.h
View File

@ -37,11 +37,6 @@ extern int __cpu_logical_map[NR_CPUS];
#define NO_PROC_ID (-1)
#define topology_physical_package_id(cpu) (cpu_data[cpu].package)
#define topology_core_id(cpu) (cpu_data[cpu].core)
#define topology_core_cpumask(cpu) (&cpu_core_map[cpu])
#define topology_thread_cpumask(cpu) (&cpu_sibling_map[cpu])
#define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */
#define SMP_CALL_FUNCTION 0x2
/* Octeon - Tell another core to flush its icache */

4
arch/mips/include/asm/switch_to.h
View File

@ -92,7 +92,7 @@ do { \
KSTK_STATUS(prev) &= ~ST0_CU2; \
__c0_stat = read_c0_status(); \
write_c0_status(__c0_stat | ST0_CU2); \
cop2_save(&prev->thread.cp2); \
cop2_save(prev); \
write_c0_status(__c0_stat & ~ST0_CU2); \
} \
__clear_software_ll_bit(); \
@ -111,7 +111,7 @@ do { \
(KSTK_STATUS(current) & ST0_CU2)) { \
__c0_stat = read_c0_status(); \
write_c0_status(__c0_stat | ST0_CU2); \
cop2_restore(&current->thread.cp2); \
cop2_restore(current); \
write_c0_status(__c0_stat & ~ST0_CU2); \
} \
if (cpu_has_dsp) \

8
arch/mips/include/asm/topology.h
View File

@ -9,5 +9,13 @@
#define __ASM_TOPOLOGY_H
#include <topology.h>
#include <linux/smp.h>
#ifdef CONFIG_SMP
#define topology_physical_package_id(cpu) (cpu_data[cpu].package)
#define topology_core_id(cpu) (cpu_data[cpu].core)
#define topology_core_cpumask(cpu) (&cpu_core_map[cpu])
#define topology_thread_cpumask(cpu) (&cpu_sibling_map[cpu])
#endif
#endif /* __ASM_TOPOLOGY_H */

18
arch/mips/include/uapi/asm/unistd.h
View File

@ -373,16 +373,18 @@
#define __NR_sched_getattr (__NR_Linux + 350)
#define __NR_renameat2 (__NR_Linux + 351)
#define __NR_seccomp (__NR_Linux + 352)
#define __NR_getrandom (__NR_Linux + 353)
#define __NR_memfd_create (__NR_Linux + 354)
/*
* Offset of the last Linux o32 flavoured syscall
*/
#define __NR_Linux_syscalls 352
#define __NR_Linux_syscalls 354
#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
#define __NR_O32_Linux 4000
#define __NR_O32_Linux_syscalls 352
#define __NR_O32_Linux_syscalls 354
#if _MIPS_SIM == _MIPS_SIM_ABI64
@ -703,16 +705,18 @@
#define __NR_sched_getattr (__NR_Linux + 310)
#define __NR_renameat2 (__NR_Linux + 311)
#define __NR_seccomp (__NR_Linux + 312)
#define __NR_getrandom (__NR_Linux + 313)
#define __NR_memfd_create (__NR_Linux + 314)
/*
* Offset of the last Linux 64-bit flavoured syscall
*/
#define __NR_Linux_syscalls 312
#define __NR_Linux_syscalls 314
#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
#define __NR_64_Linux 5000
#define __NR_64_Linux_syscalls 312
#define __NR_64_Linux_syscalls 314
#if _MIPS_SIM == _MIPS_SIM_NABI32
@ -1037,15 +1041,17 @@
#define __NR_sched_getattr (__NR_Linux + 314)
#define __NR_renameat2 (__NR_Linux + 315)
#define __NR_seccomp (__NR_Linux + 316)
#define __NR_getrandom (__NR_Linux + 317)
#define __NR_memfd_create (__NR_Linux + 318)
/*
* Offset of the last N32 flavoured syscall
*/
#define __NR_Linux_syscalls 316
#define __NR_Linux_syscalls 318
#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
#define __NR_N32_Linux 6000
#define __NR_N32_Linux_syscalls 316
#define __NR_N32_Linux_syscalls 318
#endif /* _UAPI_ASM_UNISTD_H */

8
arch/mips/kernel/machine_kexec.c
View File

@ -71,8 +71,12 @@ machine_kexec(struct kimage *image)
kexec_start_address =
(unsigned long) phys_to_virt(image->start);
kexec_indirection_page =
(unsigned long) phys_to_virt(image->head & PAGE_MASK);
if (image->type == KEXEC_TYPE_DEFAULT) {
kexec_indirection_page =
(unsigned long) phys_to_virt(image->head & PAGE_MASK);
} else {
kexec_indirection_page = (unsigned long)&image->head;
}
memcpy((void*)reboot_code_buffer, relocate_new_kernel,
relocate_new_kernel_size);

2
arch/mips/kernel/scall32-o32.S
View File

@ -577,3 +577,5 @@ EXPORT(sys_call_table)
PTR sys_sched_getattr /* 4350 */
PTR sys_renameat2
PTR sys_seccomp
PTR sys_getrandom
PTR sys_memfd_create

2
arch/mips/kernel/scall64-64.S
View File

@ -432,4 +432,6 @@ EXPORT(sys_call_table)
PTR sys_sched_getattr /* 5310 */
PTR sys_renameat2
PTR sys_seccomp
PTR sys_getrandom
PTR sys_memfd_create
.size sys_call_table,.-sys_call_table

2
arch/mips/kernel/scall64-n32.S
View File

@ -425,4 +425,6 @@ EXPORT(sysn32_call_table)
PTR sys_sched_getattr
PTR sys_renameat2 /* 6315 */
PTR sys_seccomp
PTR sys_getrandom
PTR sys_memfd_create
.size sysn32_call_table,.-sysn32_call_table

2
arch/mips/kernel/scall64-o32.S
View File

@ -562,4 +562,6 @@ EXPORT(sys32_call_table)
PTR sys_sched_getattr /* 4350 */
PTR sys_renameat2
PTR sys_seccomp
PTR sys_getrandom
PTR sys_memfd_create
.size sys32_call_table,.-sys32_call_table

5
arch/mips/net/bpf_jit.c
View File

@ -793,6 +793,7 @@ static int build_body(struct jit_ctx *ctx)
const struct sock_filter *inst;
unsigned int i, off, load_order, condt;
u32 k, b_off __maybe_unused;
int tmp;
for (i = 0; i < prog->len; i++) {
u16 code;
@ -1332,9 +1333,9 @@ jmp_cmp:
case BPF_ANC | SKF_AD_PKTTYPE:
ctx->flags |= SEEN_SKB;
off = pkt_type_offset();
tmp = off = pkt_type_offset();
if (off < 0)
if (tmp < 0)
return -1;
emit_load_byte(r_tmp, r_skb, off, ctx);
/* Keep only the last 3 bits */

18
arch/x86/boot/compressed/eboot.c
View File

@ -1032,7 +1032,6 @@ struct boot_params *make_boot_params(struct efi_config *c)
int i;
unsigned long ramdisk_addr;
unsigned long ramdisk_size;
unsigned long initrd_addr_max;
efi_early = c;
sys_table = (efi_system_table_t *)(unsigned long)efi_early->table;
@ -1095,15 +1094,20 @@ struct boot_params *make_boot_params(struct efi_config *c)
memset(sdt, 0, sizeof(*sdt));
if (hdr->xloadflags & XLF_CAN_BE_LOADED_ABOVE_4G)
initrd_addr_max = -1UL;
else
initrd_addr_max = hdr->initrd_addr_max;
status = handle_cmdline_files(sys_table, image,
(char *)(unsigned long)hdr->cmd_line_ptr,
"initrd=", initrd_addr_max,
"initrd=", hdr->initrd_addr_max,
&ramdisk_addr, &ramdisk_size);
if (status != EFI_SUCCESS &&
hdr->xloadflags & XLF_CAN_BE_LOADED_ABOVE_4G) {
efi_printk(sys_table, "Trying to load files to higher address\n");
status = handle_cmdline_files(sys_table, image,
(char *)(unsigned long)hdr->cmd_line_ptr,
"initrd=", -1UL,
&ramdisk_addr, &ramdisk_size);
}
if (status != EFI_SUCCESS)
goto fail2;
hdr->ramdisk_image = ramdisk_addr & 0xffffffff;

54
arch/x86/boot/compressed/head_32.S
View File

@ -30,6 +30,33 @@
#include <asm/boot.h>
#include <asm/asm-offsets.h>
/*
* Adjust our own GOT
*
* The relocation base must be in %ebx
*
* It is safe to call this macro more than once, because in some of the
* code paths multiple invocations are inevitable, e.g. via the efi*
* entry points.
*
* Relocation is only performed the first time.
*/
.macro FIXUP_GOT
cmpb $1, got_fixed(%ebx)
je 2f
leal _got(%ebx), %edx
leal _egot(%ebx), %ecx
1:
cmpl %ecx, %edx
jae 2f
addl %ebx, (%edx)
addl $4, %edx
jmp 1b
2:
movb $1, got_fixed(%ebx)
.endm
__HEAD
ENTRY(startup_32)
#ifdef CONFIG_EFI_STUB
@ -56,6 +83,9 @@ ENTRY(efi_pe_entry)
add %esi, 88(%eax)
pushl %eax
movl %esi, %ebx
FIXUP_GOT
call make_boot_params
cmpl $0, %eax
je fail
@ -81,6 +111,10 @@ ENTRY(efi32_stub_entry)
leal efi32_config(%esi), %eax
add %esi, 88(%eax)
pushl %eax
movl %esi, %ebx
FIXUP_GOT
2:
call efi_main
cmpl $0, %eax
@ -190,19 +224,7 @@ relocated:
shrl $2, %ecx
rep stosl
/*
* Adjust our own GOT
*/
leal _got(%ebx), %edx
leal _egot(%ebx), %ecx
1:
cmpl %ecx, %edx
jae 2f
addl %ebx, (%edx)
addl $4, %edx
jmp 1b
2:
FIXUP_GOT
/*
* Do the decompression, and jump to the new kernel..
*/
@ -225,8 +247,12 @@ relocated:
xorl %ebx, %ebx
jmp *%eax
#ifdef CONFIG_EFI_STUB
.data
/* Have we relocated the GOT? */
got_fixed:
.byte 0
#ifdef CONFIG_EFI_STUB
efi32_config:
.fill 11,8,0
.long efi_call_phys

56
arch/x86/boot/compressed/head_64.S
View File

@ -32,6 +32,33 @@
#include <asm/processor-flags.h>
#include <asm/asm-offsets.h>
/*
* Adjust our own GOT
*
* The relocation base must be in %rbx
*
* It is safe to call this macro more than once, because in some of the
* code paths multiple invocations are inevitable, e.g. via the efi*
* entry points.
*
* Relocation is only performed the first time.
*/
.macro FIXUP_GOT
cmpb $1, got_fixed(%rip)
je 2f
leaq _got(%rip), %rdx
leaq _egot(%rip), %rcx
1:
cmpq %rcx, %rdx
jae 2f
addq %rbx, (%rdx)
addq $8, %rdx
jmp 1b
2:
movb $1, got_fixed(%rip)
.endm
__HEAD
.code32
ENTRY(startup_32)
@ -252,10 +279,13 @@ ENTRY(efi_pe_entry)
subq $1b, %rbp
/*
* Relocate efi_config->call().
* Relocate efi_config->call() and the GOT entries.
*/
addq %rbp, efi64_config+88(%rip)
movq %rbp, %rbx
FIXUP_GOT
movq %rax, %rdi
call make_boot_params
cmpq $0,%rax
@ -271,10 +301,13 @@ handover_entry:
subq $1b, %rbp
/*
* Relocate efi_config->call().
* Relocate efi_config->call() and the GOT entries.
*/
movq efi_config(%rip), %rax
addq %rbp, 88(%rax)
movq %rbp, %rbx
FIXUP_GOT
2:
movq efi_config(%rip), %rdi
call efi_main
@ -385,19 +418,8 @@ relocated:
shrq $3, %rcx
rep stosq
/*
* Adjust our own GOT
*/
leaq _got(%rip), %rdx
leaq _egot(%rip), %rcx
1:
cmpq %rcx, %rdx
jae 2f
addq %rbx, (%rdx)
addq $8, %rdx
jmp 1b
2:
FIXUP_GOT
/*
* Do the decompression, and jump to the new kernel..
*/
@ -437,6 +459,10 @@ gdt:
.quad 0x0000000000000000 /* TS continued */
gdt_end:
/* Have we relocated the GOT? */
got_fixed:
.byte 0
#ifdef CONFIG_EFI_STUB
efi_config:
.quad 0

1
arch/x86/include/asm/io_apic.h
View File

@ -239,6 +239,7 @@ static inline int mp_find_ioapic(u32 gsi) { return 0; }
static inline u32 mp_pin_to_gsi(int ioapic, int pin) { return UINT_MAX; }
static inline int mp_map_gsi_to_irq(u32 gsi, unsigned int flags) { return gsi; }
static inline void mp_unmap_irq(int irq) { }
static inline bool mp_should_keep_irq(struct device *dev) { return 1; }
static inline int save_ioapic_entries(void)
{

4
arch/x86/kernel/kprobes/opt.c
View File

@ -338,8 +338,10 @@ int arch_prepare_optimized_kprobe(struct optimized_kprobe *op)
* a relative jump.
*/
rel = (long)op->optinsn.insn - (long)op->kp.addr + RELATIVEJUMP_SIZE;
if (abs(rel) > 0x7fffffff)
if (abs(rel) > 0x7fffffff) {
__arch_remove_optimized_kprobe(op, 0);
return -ERANGE;
}
buf = (u8 *)op->optinsn.insn;

4
arch/x86/mm/dump_pagetables.c
View File

@ -48,7 +48,9 @@ enum address_markers_idx {
LOW_KERNEL_NR,
VMALLOC_START_NR,
VMEMMAP_START_NR,
# ifdef CONFIG_X86_ESPFIX64
ESPFIX_START_NR,
# endif
HIGH_KERNEL_NR,
MODULES_VADDR_NR,
MODULES_END_NR,
@ -71,7 +73,9 @@ static struct addr_marker address_markers[] = {
{ PAGE_OFFSET, "Low Kernel Mapping" },
{ VMALLOC_START, "vmalloc() Area" },
{ VMEMMAP_START, "Vmemmap" },
# ifdef CONFIG_X86_ESPFIX64
{ ESPFIX_BASE_ADDR, "ESPfix Area", 16 },
# endif
{ __START_KERNEL_map, "High Kernel Mapping" },
{ MODULES_VADDR, "Modules" },
{ MODULES_END, "End Modules" },

2
arch/x86/mm/mmap.c
View File

@ -31,7 +31,7 @@
#include <linux/sched.h>
#include <asm/elf.h>
struct __read_mostly va_alignment va_align = {
struct va_alignment __read_mostly va_align = {
.flags = -1,
};

24
arch/x86/pci/fixup.c
View File

@ -326,27 +326,6 @@ static void pci_fixup_video(struct pci_dev *pdev)
struct pci_bus *bus;
u16 config;
if (!vga_default_device()) {
resource_size_t start, end;
int i;
/* Does firmware framebuffer belong to us? */
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
continue;
start = pci_resource_start(pdev, i);
end = pci_resource_end(pdev, i);
if (!start || !end)
continue;
if (screen_info.lfb_base >= start &&
(screen_info.lfb_base + screen_info.lfb_size) < end)
vga_set_default_device(pdev);
}
}
/* Is VGA routed to us? */
bus = pdev->bus;
while (bus) {
@ -371,8 +350,7 @@ static void pci_fixup_video(struct pci_dev *pdev)
pci_read_config_word(pdev, PCI_COMMAND, &config);
if (config & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {
pdev->resource[PCI_ROM_RESOURCE].flags |= IORESOURCE_ROM_SHADOW;
dev_printk(KERN_DEBUG, &pdev->dev, "Boot video device\n");
vga_set_default_device(pdev);
dev_printk(KERN_DEBUG, &pdev->dev, "Video device with shadowed ROM\n");
}
}
}

3
crypto/drbg.c
View File

@ -1922,9 +1922,6 @@ static inline int __init drbg_healthcheck_sanity(void)
/* overflow max addtllen with personalization string */
ret = drbg_instantiate(drbg, &addtl, coreref, pr);
BUG_ON(0 == ret);
/* test uninstantated DRBG */
len = drbg_generate(drbg, buf, (max_request_bytes + 1), NULL);
BUG_ON(0 < len);
/* all tests passed */
rc = 0;

10
drivers/acpi/bus.c
View File

@ -177,16 +177,6 @@ void acpi_bus_detach_private_data(acpi_handle handle)
}
EXPORT_SYMBOL_GPL(acpi_bus_detach_private_data);
void acpi_bus_no_hotplug(acpi_handle handle)
{
struct acpi_device *adev = NULL;
acpi_bus_get_device(handle, &adev);
if (adev)
adev->flags.no_hotplug = true;
}
EXPORT_SYMBOL_GPL(acpi_bus_no_hotplug);
static void acpi_print_osc_error(acpi_handle handle,
struct acpi_osc_context *context, char *error)
{

9
drivers/base/regmap/regmap-debugfs.c
View File

@ -512,7 +512,14 @@ void regmap_debugfs_init(struct regmap *map, const char *name)
map, &regmap_reg_ranges_fops);
if (map->max_register || regmap_readable(map, 0)) {
debugfs_create_file("registers", 0400, map->debugfs,
umode_t registers_mode;
if (IS_ENABLED(REGMAP_ALLOW_WRITE_DEBUGFS))
registers_mode = 0600;
else
registers_mode = 0400;
debugfs_create_file("registers", registers_mode, map->debugfs,
map, &regmap_map_fops);
debugfs_create_file("access", 0400, map->debugfs,
map, &regmap_access_fops);

7
drivers/char/hw_random/virtio-rng.c
View File

@ -36,6 +36,7 @@ struct virtrng_info {
int index;
bool busy;
bool hwrng_register_done;
bool hwrng_removed;
};
@ -68,6 +69,9 @@ static int virtio_read(struct hwrng *rng, void *buf, size_t size, bool wait)
int ret;
struct virtrng_info *vi = (struct virtrng_info *)rng->priv;
if (vi->hwrng_removed)
return -ENODEV;
if (!vi->busy) {
vi->busy = true;
init_completion(&vi->have_data);
@ -137,6 +141,9 @@ static void remove_common(struct virtio_device *vdev)
{
struct virtrng_info *vi = vdev->priv;
vi->hwrng_removed = true;
vi->data_avail = 0;
complete(&vi->have_data);
vdev->config->reset(vdev);
vi->busy = false;
if (vi->hwrng_register_done)

10
drivers/firmware/efi/libstub/fdt.c
View File

@ -22,7 +22,7 @@ efi_status_t update_fdt(efi_system_table_t *sys_table, void *orig_fdt,
unsigned long map_size, unsigned long desc_size,
u32 desc_ver)
{
int node, prev;
int node, prev, num_rsv;
int status;
u32 fdt_val32;
u64 fdt_val64;
@ -73,6 +73,14 @@ efi_status_t update_fdt(efi_system_table_t *sys_table, void *orig_fdt,
prev = node;
}
/*
* Delete all memory reserve map entries. When booting via UEFI,
* kernel will use the UEFI memory map to find reserved regions.
*/
num_rsv = fdt_num_mem_rsv(fdt);
while (num_rsv-- > 0)
fdt_del_mem_rsv(fdt, num_rsv);
node = fdt_subnode_offset(fdt, 0, "chosen");
if (node < 0) {
node = fdt_add_subnode(fdt, 0, "chosen");

1
drivers/gpu/drm/bochs/bochs_kms.c
View File

@ -250,6 +250,7 @@ static void bochs_connector_init(struct drm_device *dev)
DRM_MODE_CONNECTOR_VIRTUAL);
drm_connector_helper_add(connector,
&bochs_connector_connector_helper_funcs);
drm_connector_register(connector);
}

1
drivers/gpu/drm/cirrus/cirrus_mode.c
View File

@ -555,6 +555,7 @@ static struct drm_connector *cirrus_vga_init(struct drm_device *dev)
drm_connector_helper_add(connector, &cirrus_vga_connector_helper_funcs);
drm_connector_register(connector);
return connector;
}

4
drivers/gpu/drm/i915/intel_dp.c
View File

@ -1631,6 +1631,10 @@ static void intel_dp_get_config(struct intel_encoder *encoder,
pipe_config->adjusted_mode.flags |= flags;
if (!HAS_PCH_SPLIT(dev) && !IS_VALLEYVIEW(dev) &&
tmp & DP_COLOR_RANGE_16_235)
pipe_config->limited_color_range = true;
pipe_config->has_dp_encoder = true;
intel_dp_get_m_n(crtc, pipe_config);

7
drivers/gpu/drm/i915/intel_hdmi.c
View File

@ -712,7 +712,8 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder,
struct intel_crtc_config *pipe_config)
{
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
struct drm_device *dev = encoder->base.dev;
struct drm_i915_private *dev_priv = dev->dev_private;
u32 tmp, flags = 0;
int dotclock;
@ -734,6 +735,10 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder,
if (tmp & HDMI_MODE_SELECT_HDMI)
pipe_config->has_audio = true;
if (!HAS_PCH_SPLIT(dev) &&
tmp & HDMI_COLOR_RANGE_16_235)
pipe_config->limited_color_range = true;
pipe_config->adjusted_mode.flags |= flags;
if ((tmp & SDVO_COLOR_FORMAT_MASK) == HDMI_COLOR_FORMAT_12bpc)

2
drivers/gpu/drm/i915/intel_ringbuffer.c
View File

@ -1400,7 +1400,7 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
*/
intel_ring_emit(ring, SRC_COPY_BLT_CMD | BLT_WRITE_RGBA);
intel_ring_emit(ring, BLT_DEPTH_32 | BLT_ROP_SRC_COPY | 4096);
intel_ring_emit(ring, DIV_ROUND_UP(len, 4096) << 16 | 1024);
intel_ring_emit(ring, DIV_ROUND_UP(len, 4096) << 16 | 4096);
intel_ring_emit(ring, cs_offset);
intel_ring_emit(ring, 4096);
intel_ring_emit(ring, offset);

1
drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c
View File

@ -200,7 +200,6 @@ nvc0_bar_init(struct nouveau_object *object)
nv_mask(priv, 0x000200, 0x00000100, 0x00000000);
nv_mask(priv, 0x000200, 0x00000100, 0x00000100);
nv_mask(priv, 0x100c80, 0x00000001, 0x00000000);
nv_wr32(priv, 0x001704, 0x80000000 | priv->bar[1].mem->addr >> 12);
if (priv->bar[0].mem)

1
drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c
View File

@ -60,6 +60,7 @@ nvc0_fb_init(struct nouveau_object *object)
if (priv->r100c10_page)
nv_wr32(priv, 0x100c10, priv->r100c10 >> 8);
nv_mask(priv, 0x100c80, 0x00000001, 0x00000000); /* 128KiB lpg */
return 0;
}

2
drivers/gpu/drm/nouveau/core/subdev/ltc/gf100.c
View File

@ -98,6 +98,7 @@ static int
gf100_ltc_init(struct nouveau_object *object)
{
struct nvkm_ltc_priv *priv = (void *)object;
u32 lpg128 = !(nv_rd32(priv, 0x100c80) & 0x00000001);
int ret;
ret = nvkm_ltc_init(priv);
@ -107,6 +108,7 @@ gf100_ltc_init(struct nouveau_object *object)
nv_mask(priv, 0x17e820, 0x00100000, 0x00000000); /* INTR_EN &= ~0x10 */
nv_wr32(priv, 0x17e8d8, priv->ltc_nr);
nv_wr32(priv, 0x17e8d4, priv->tag_base);
nv_mask(priv, 0x17e8c0, 0x00000002, lpg128 ? 0x00000002 : 0x00000000);
return 0;
}

2
drivers/gpu/drm/nouveau/core/subdev/ltc/gk104.c
View File

@ -28,6 +28,7 @@ static int
gk104_ltc_init(struct nouveau_object *object)
{
struct nvkm_ltc_priv *priv = (void *)object;
u32 lpg128 = !(nv_rd32(priv, 0x100c80) & 0x00000001);
int ret;
ret = nvkm_ltc_init(priv);
@ -37,6 +38,7 @@ gk104_ltc_init(struct nouveau_object *object)
nv_wr32(priv, 0x17e8d8, priv->ltc_nr);
nv_wr32(priv, 0x17e000, priv->ltc_nr);
nv_wr32(priv, 0x17e8d4, priv->tag_base);
nv_mask(priv, 0x17e8c0, 0x00000002, lpg128 ? 0x00000002 : 0x00000000);
return 0;
}

2
drivers/gpu/drm/nouveau/core/subdev/ltc/gm107.c
View File

@ -98,6 +98,7 @@ static int
gm107_ltc_init(struct nouveau_object *object)
{
struct nvkm_ltc_priv *priv = (void *)object;
u32 lpg128 = !(nv_rd32(priv, 0x100c80) & 0x00000001);
int ret;
ret = nvkm_ltc_init(priv);
@ -106,6 +107,7 @@ gm107_ltc_init(struct nouveau_object *object)
nv_wr32(priv, 0x17e27c, priv->ltc_nr);
nv_wr32(priv, 0x17e278, priv->tag_base);
nv_mask(priv, 0x17e264, 0x00000002, lpg128 ? 0x00000002 : 0x00000000);
return 0;
}

16
drivers/gpu/drm/nouveau/nouveau_acpi.c
View File

@ -46,7 +46,6 @@ static struct nouveau_dsm_priv {
bool dsm_detected;
bool optimus_detected;
acpi_handle dhandle;
acpi_handle other_handle;
acpi_handle rom_handle;
} nouveau_dsm_priv;
@ -222,10 +221,9 @@ static int nouveau_dsm_pci_probe(struct pci_dev *pdev)
if (!dhandle)
return false;
if (!acpi_has_method(dhandle, "_DSM")) {
nouveau_dsm_priv.other_handle = dhandle;
if (!acpi_has_method(dhandle, "_DSM"))
return false;
}
if (acpi_check_dsm(dhandle, nouveau_dsm_muid, 0x00000102,
1 << NOUVEAU_DSM_POWER))
retval |= NOUVEAU_DSM_HAS_MUX;
@ -301,16 +299,6 @@ static bool nouveau_dsm_detect(void)
printk(KERN_INFO "VGA switcheroo: detected DSM switching method %s handle\n",
acpi_method_name);
nouveau_dsm_priv.dsm_detected = true;
/*
* On some systems hotplug events are generated for the device
* being switched off when _DSM is executed. They cause ACPI
* hotplug to trigger and attempt to remove the device from
* the system, which causes it to break down. Prevent that from
* happening by setting the no_hotplug flag for the involved
* ACPI device objects.
*/
acpi_bus_no_hotplug(nouveau_dsm_priv.dhandle);
acpi_bus_no_hotplug(nouveau_dsm_priv.other_handle);
ret = true;
}

1
drivers/gpu/drm/nouveau/nouveau_drm.c
View File

@ -627,6 +627,7 @@ int nouveau_pmops_suspend(struct device *dev)
pci_save_state(pdev);
pci_disable_device(pdev);
pci_ignore_hotplug(pdev);
pci_set_power_state(pdev, PCI_D3hot);
return 0;
}

9
drivers/gpu/drm/nouveau/nouveau_vga.c
View File

@ -108,7 +108,16 @@ void
nouveau_vga_fini(struct nouveau_drm *drm)
{
struct drm_device *dev = drm->dev;
bool runtime = false;
if (nouveau_runtime_pm == 1)
runtime = true;
if ((nouveau_runtime_pm == -1) && (nouveau_is_optimus() || nouveau_is_v1_dsm()))
runtime = true;
vga_switcheroo_unregister_client(dev->pdev);
if (runtime && nouveau_is_v1_dsm() && !nouveau_is_optimus())
vga_switcheroo_fini_domain_pm_ops(drm->dev->dev);
vga_client_register(dev->pdev, NULL, NULL, NULL);
}

7
drivers/gpu/drm/radeon/cik_sdma.c
View File

@ -489,13 +489,6 @@ int cik_sdma_resume(struct radeon_device *rdev)
{
int r;
/* Reset dma */
WREG32(SRBM_SOFT_RESET, SOFT_RESET_SDMA | SOFT_RESET_SDMA1);
RREG32(SRBM_SOFT_RESET);
udelay(50);
WREG32(SRBM_SOFT_RESET, 0);
RREG32(SRBM_SOFT_RESET);
r = cik_sdma_load_microcode(rdev);
if (r)
return r;

28
drivers/gpu/drm/radeon/kv_dpm.c
View File

@ -33,6 +33,8 @@
#define KV_MINIMUM_ENGINE_CLOCK 800
#define SMC_RAM_END 0x40000
static int kv_enable_nb_dpm(struct radeon_device *rdev,
bool enable);
static void kv_init_graphics_levels(struct radeon_device *rdev);
static int kv_calculate_ds_divider(struct radeon_device *rdev);
static int kv_calculate_nbps_level_settings(struct radeon_device *rdev);
@ -1295,6 +1297,9 @@ void kv_dpm_disable(struct radeon_device *rdev)
{
kv_smc_bapm_enable(rdev, false);
if (rdev->family == CHIP_MULLINS)
kv_enable_nb_dpm(rdev, false);
/* powerup blocks */
kv_dpm_powergate_acp(rdev, false);
kv_dpm_powergate_samu(rdev, false);
@ -1769,15 +1774,24 @@ static int kv_update_dfs_bypass_settings(struct radeon_device *rdev,
return ret;
}
static int kv_enable_nb_dpm(struct radeon_device *rdev)
static int kv_enable_nb_dpm(struct radeon_device *rdev,
bool enable)
{
struct kv_power_info *pi = kv_get_pi(rdev);
int ret = 0;
if (pi->enable_nb_dpm && !pi->nb_dpm_enabled) {
ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_NBDPM_Enable);
if (ret == 0)
pi->nb_dpm_enabled = true;
if (enable) {
if (pi->enable_nb_dpm && !pi->nb_dpm_enabled) {
ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_NBDPM_Enable);
if (ret == 0)
pi->nb_dpm_enabled = true;
}
} else {
if (pi->enable_nb_dpm && pi->nb_dpm_enabled) {
ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_NBDPM_Disable);
if (ret == 0)
pi->nb_dpm_enabled = false;
}
}
return ret;
@ -1864,7 +1878,7 @@ int kv_dpm_set_power_state(struct radeon_device *rdev)
}
kv_update_sclk_t(rdev);
if (rdev->family == CHIP_MULLINS)
kv_enable_nb_dpm(rdev);
kv_enable_nb_dpm(rdev, true);
}
} else {
if (pi->enable_dpm) {
@ -1889,7 +1903,7 @@ int kv_dpm_set_power_state(struct radeon_device *rdev)
}
kv_update_acp_boot_level(rdev);
kv_update_sclk_t(rdev);
kv_enable_nb_dpm(rdev);
kv_enable_nb_dpm(rdev, true);
}
}

6
drivers/gpu/drm/radeon/ni_dma.c
View File

@ -191,12 +191,6 @@ int cayman_dma_resume(struct radeon_device *rdev)
u32 reg_offset, wb_offset;
int i, r;
/* Reset dma */
WREG32(SRBM_SOFT_RESET, SOFT_RESET_DMA | SOFT_RESET_DMA1);
RREG32(SRBM_SOFT_RESET);
udelay(50);
WREG32(SRBM_SOFT_RESET, 0);
for (i = 0; i < 2; i++) {
if (i == 0) {
ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX];

28
drivers/gpu/drm/radeon/r100.c
View File

@ -821,6 +821,20 @@ u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc)
return RREG32(RADEON_CRTC2_CRNT_FRAME);
}
/**
* r100_ring_hdp_flush - flush Host Data Path via the ring buffer
* rdev: radeon device structure
* ring: ring buffer struct for emitting packets
*/
static void r100_ring_hdp_flush(struct radeon_device *rdev, struct radeon_ring *ring)
{
radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));
radeon_ring_write(ring, rdev->config.r100.hdp_cntl |
RADEON_HDP_READ_BUFFER_INVALIDATE);
radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));
radeon_ring_write(ring, rdev->config.r100.hdp_cntl);
}
/* Who ever call radeon_fence_emit should call ring_lock and ask
* for enough space (today caller are ib schedule and buffer move) */
void r100_fence_ring_emit(struct radeon_device *rdev,
@ -1056,20 +1070,6 @@ void r100_gfx_set_wptr(struct radeon_device *rdev,
(void)RREG32(RADEON_CP_RB_WPTR);
}
/**
* r100_ring_hdp_flush - flush Host Data Path via the ring buffer
* rdev: radeon device structure
* ring: ring buffer struct for emitting packets
*/
void r100_ring_hdp_flush(struct radeon_device *rdev, struct radeon_ring *ring)
{
radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));
radeon_ring_write(ring, rdev->config.r100.hdp_cntl |
RADEON_HDP_READ_BUFFER_INVALIDATE);
radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));
radeon_ring_write(ring, rdev->config.r100.hdp_cntl);
}
static void r100_cp_load_microcode(struct radeon_device *rdev)
{
const __be32 *fw_data;

9
drivers/gpu/drm/radeon/r600_dma.c
View File

@ -124,15 +124,6 @@ int r600_dma_resume(struct radeon_device *rdev)
u32 rb_bufsz;
int r;
/* Reset dma */
if (rdev->family >= CHIP_RV770)
WREG32(SRBM_SOFT_RESET, RV770_SOFT_RESET_DMA);
else
WREG32(SRBM_SOFT_RESET, SOFT_RESET_DMA);
RREG32(SRBM_SOFT_RESET);
udelay(50);
WREG32(SRBM_SOFT_RESET, 0);
WREG32(DMA_SEM_INCOMPLETE_TIMER_CNTL, 0);
WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL, 0);

7
drivers/gpu/drm/radeon/r600d.h
View File

@ -44,13 +44,6 @@
#define R6XX_MAX_PIPES 8
#define R6XX_MAX_PIPES_MASK 0xff
/* PTE flags */
#define PTE_VALID (1 << 0)
#define PTE_SYSTEM (1 << 1)
#define PTE_SNOOPED (1 << 2)
#define PTE_READABLE (1 << 5)
#define PTE_WRITEABLE (1 << 6)
/* tiling bits */
#define ARRAY_LINEAR_GENERAL 0x00000000
#define ARRAY_LINEAR_ALIGNED 0x00000001

2
drivers/gpu/drm/radeon/radeon_asic.c
View File

@ -185,7 +185,6 @@ static struct radeon_asic_ring r100_gfx_ring = {
.get_rptr = &r100_gfx_get_rptr,
.get_wptr = &r100_gfx_get_wptr,
.set_wptr = &r100_gfx_set_wptr,
.hdp_flush = &r100_ring_hdp_flush,
};
static struct radeon_asic r100_asic = {
@ -332,7 +331,6 @@ static struct radeon_asic_ring r300_gfx_ring = {
.get_rptr = &r100_gfx_get_rptr,
.get_wptr = &r100_gfx_get_wptr,
.set_wptr = &r100_gfx_set_wptr,
.hdp_flush = &r100_ring_hdp_flush,
};
static struct radeon_asic r300_asic = {

3
drivers/gpu/drm/radeon/radeon_asic.h
View File

@ -148,8 +148,7 @@ u32 r100_gfx_get_wptr(struct radeon_device *rdev,
struct radeon_ring *ring);
void r100_gfx_set_wptr(struct radeon_device *rdev,
struct radeon_ring *ring);
void r100_ring_hdp_flush(struct radeon_device *rdev,
struct radeon_ring *ring);
/*
* r200,rv250,rs300,rv280
*/

16
drivers/gpu/drm/radeon/radeon_atpx_handler.c
View File

@ -33,7 +33,6 @@ static struct radeon_atpx_priv {
bool atpx_detected;
/* handle for device - and atpx */
acpi_handle dhandle;
acpi_handle other_handle;
struct radeon_atpx atpx;
} radeon_atpx_priv;
@ -453,10 +452,9 @@ static bool radeon_atpx_pci_probe_handle(struct pci_dev *pdev)
return false;
status = acpi_get_handle(dhandle, "ATPX", &atpx_handle);
if (ACPI_FAILURE(status)) {
radeon_atpx_priv.other_handle = dhandle;
if (ACPI_FAILURE(status))
return false;
}
radeon_atpx_priv.dhandle = dhandle;
radeon_atpx_priv.atpx.handle = atpx_handle;
return true;
@ -540,16 +538,6 @@ static bool radeon_atpx_detect(void)
printk(KERN_INFO "VGA switcheroo: detected switching method %s handle\n",
acpi_method_name);
radeon_atpx_priv.atpx_detected = true;
/*
* On some systems hotplug events are generated for the device
* being switched off when ATPX is executed. They cause ACPI
* hotplug to trigger and attempt to remove the device from
* the system, which causes it to break down. Prevent that from
* happening by setting the no_hotplug flag for the involved
* ACPI device objects.
*/
acpi_bus_no_hotplug(radeon_atpx_priv.dhandle);
acpi_bus_no_hotplug(radeon_atpx_priv.other_handle);
return true;
}
return false;

11
drivers/gpu/drm/radeon/radeon_device.c
View File

@ -1393,7 +1393,7 @@ int radeon_device_init(struct radeon_device *rdev,
r = radeon_init(rdev);
if (r)
return r;
goto failed;
r = radeon_ib_ring_tests(rdev);
if (r)
@ -1413,7 +1413,7 @@ int radeon_device_init(struct radeon_device *rdev,
radeon_agp_disable(rdev);
r = radeon_init(rdev);
if (r)
return r;
goto failed;
}
if ((radeon_testing & 1)) {
@ -1435,6 +1435,11 @@ int radeon_device_init(struct radeon_device *rdev,
DRM_INFO("radeon: acceleration disabled, skipping benchmarks\n");
}
return 0;
failed:
if (runtime)
vga_switcheroo_fini_domain_pm_ops(rdev->dev);
return r;
}
static void radeon_debugfs_remove_files(struct radeon_device *rdev);
@ -1455,6 +1460,8 @@ void radeon_device_fini(struct radeon_device *rdev)
radeon_bo_evict_vram(rdev);
radeon_fini(rdev);
vga_switcheroo_unregister_client(rdev->pdev);
if (rdev->flags & RADEON_IS_PX)
vga_switcheroo_fini_domain_pm_ops(rdev->dev);
vga_client_register(rdev->pdev, NULL, NULL, NULL);
if (rdev->rio_mem)
pci_iounmap(rdev->pdev, rdev->rio_mem);

3
drivers/gpu/drm/radeon/radeon_drv.c
View File

@ -83,7 +83,7 @@
* CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
* 2.39.0 - Add INFO query for number of active CUs
* 2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
* CS to GPU
* CS to GPU on >= r600
*/
#define KMS_DRIVER_MAJOR 2
#define KMS_DRIVER_MINOR 40
@ -440,6 +440,7 @@ static int radeon_pmops_runtime_suspend(struct device *dev)
ret = radeon_suspend_kms(drm_dev, false, false);
pci_save_state(pdev);
pci_disable_device(pdev);
pci_ignore_hotplug(pdev);
pci_set_power_state(pdev, PCI_D3cold);
drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;

4
drivers/gpu/drm/radeon/rs400.c
View File

@ -221,9 +221,9 @@ void rs400_gart_set_page(struct radeon_device *rdev, unsigned i,
entry = (lower_32_bits(addr) & PAGE_MASK) |
((upper_32_bits(addr) & 0xff) << 4);
if (flags & RADEON_GART_PAGE_READ)
addr |= RS400_PTE_READABLE;
entry |= RS400_PTE_READABLE;
if (flags & RADEON_GART_PAGE_WRITE)
addr |= RS400_PTE_WRITEABLE;
entry |= RS400_PTE_WRITEABLE;
if (!(flags & RADEON_GART_PAGE_SNOOP))
entry |= RS400_PTE_UNSNOOPED;
entry = cpu_to_le32(entry);

1
drivers/gpu/drm/sti/sti_hdmi.c
View File

@ -298,7 +298,6 @@ static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi)
hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD2(HDMI_IFRAME_SLOT_AVI));
val = frame[0xC];
val |= frame[0xD] << 8;
hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD3(HDMI_IFRAME_SLOT_AVI));
/* Enable transmission slot for AVI infoframe

6
drivers/gpu/vga/vga_switcheroo.c
View File

@ -660,6 +660,12 @@ int vga_switcheroo_init_domain_pm_ops(struct device *dev, struct dev_pm_domain *
}
EXPORT_SYMBOL(vga_switcheroo_init_domain_pm_ops);
void vga_switcheroo_fini_domain_pm_ops(struct device *dev)
{
dev->pm_domain = NULL;
}
EXPORT_SYMBOL(vga_switcheroo_fini_domain_pm_ops);
static int vga_switcheroo_runtime_resume_hdmi_audio(struct device *dev)
{
struct pci_dev *pdev = to_pci_dev(dev);

46
drivers/gpu/vga/vgaarb.c
View File

@ -41,6 +41,7 @@
#include <linux/poll.h>
#include <linux/miscdevice.h>
#include <linux/slab.h>
#include <linux/screen_info.h>
#include <linux/uaccess.h>
@ -112,10 +113,8 @@ both:
return 1;
}
#ifndef __ARCH_HAS_VGA_DEFAULT_DEVICE
/* this is only used a cookie - it should not be dereferenced */
static struct pci_dev *vga_default;
#endif
static void vga_arb_device_card_gone(struct pci_dev *pdev);
@ -131,7 +130,6 @@ static struct vga_device *vgadev_find(struct pci_dev *pdev)
}
/* Returns the default VGA device (vgacon's babe) */
#ifndef __ARCH_HAS_VGA_DEFAULT_DEVICE
struct pci_dev *vga_default_device(void)
{
return vga_default;
@ -147,7 +145,6 @@ void vga_set_default_device(struct pci_dev *pdev)
pci_dev_put(vga_default);
vga_default = pci_dev_get(pdev);
}
#endif
static inline void vga_irq_set_state(struct vga_device *vgadev, bool state)
{
@ -583,11 +580,12 @@ static bool vga_arbiter_add_pci_device(struct pci_dev *pdev)
/* Deal with VGA default device. Use first enabled one
* by default if arch doesn't have it's own hook
*/
#ifndef __ARCH_HAS_VGA_DEFAULT_DEVICE
if (vga_default == NULL &&
((vgadev->owns & VGA_RSRC_LEGACY_MASK) == VGA_RSRC_LEGACY_MASK))
((vgadev->owns & VGA_RSRC_LEGACY_MASK) == VGA_RSRC_LEGACY_MASK)) {
pr_info("vgaarb: setting as boot device: PCI:%s\n",
pci_name(pdev));
vga_set_default_device(pdev);
#endif
}
vga_arbiter_check_bridge_sharing(vgadev);
@ -621,10 +619,8 @@ static bool vga_arbiter_del_pci_device(struct pci_dev *pdev)
goto bail;
}
#ifndef __ARCH_HAS_VGA_DEFAULT_DEVICE
if (vga_default == pdev)
vga_set_default_device(NULL);
#endif
if (vgadev->decodes & (VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM))
vga_decode_count--;
@ -1320,6 +1316,38 @@ static int __init vga_arb_device_init(void)
pr_info("vgaarb: loaded\n");
list_for_each_entry(vgadev, &vga_list, list) {
#if defined(CONFIG_X86) || defined(CONFIG_IA64)
/* Override I/O based detection done by vga_arbiter_add_pci_device()
* as it may take the wrong device (e.g. on Apple system under EFI).
*
* Select the device owning the boot framebuffer if there is one.
*/
resource_size_t start, end;
int i;
/* Does firmware framebuffer belong to us? */
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
if (!(pci_resource_flags(vgadev->pdev, i) & IORESOURCE_MEM))
continue;
start = pci_resource_start(vgadev->pdev, i);
end = pci_resource_end(vgadev->pdev, i);
if (!start || !end)
continue;
if (screen_info.lfb_base < start ||
(screen_info.lfb_base + screen_info.lfb_size) >= end)
continue;
if (!vga_default_device())
pr_info("vgaarb: setting as boot device: PCI:%s\n",
pci_name(vgadev->pdev));
else if (vgadev->pdev != vga_default_device())
pr_info("vgaarb: overriding boot device: PCI:%s\n",
pci_name(vgadev->pdev));
vga_set_default_device(vgadev->pdev);
}
#endif
if (vgadev->bridge_has_one_vga)
pr_info("vgaarb: bridge control possible %s\n", pci_name(vgadev->pdev));
else

2
drivers/iio/accel/bma180.c
View File

@ -571,7 +571,7 @@ static int bma180_probe(struct i2c_client *client,
trig->ops = &bma180_trigger_ops;
iio_trigger_set_drvdata(trig, indio_dev);
data->trig = trig;
indio_dev->trig = trig;
indio_dev->trig = iio_trigger_get(trig);
ret = iio_trigger_register(trig);
if (ret)

2
drivers/iio/adc/ad_sigma_delta.c
View File

@ -472,7 +472,7 @@ static int ad_sd_probe_trigger(struct iio_dev *indio_dev)
goto error_free_irq;
/* select default trigger */
indio_dev->trig = sigma_delta->trig;
indio_dev->trig = iio_trigger_get(sigma_delta->trig);
return 0;

12
drivers/iio/adc/at91_adc.c
View File

@ -196,6 +196,7 @@ struct at91_adc_state {
bool done;
int irq;
u16 last_value;
int chnb;
struct mutex lock;
u8 num_channels;
void __iomem *reg_base;
@ -274,7 +275,7 @@ void handle_adc_eoc_trigger(int irq, struct iio_dev *idev)
disable_irq_nosync(irq);
iio_trigger_poll(idev->trig);
} else {
st->last_value = at91_adc_readl(st, AT91_ADC_LCDR);
st->last_value = at91_adc_readl(st, AT91_ADC_CHAN(st, st->chnb));
st->done = true;
wake_up_interruptible(&st->wq_data_avail);
}
@ -351,7 +352,7 @@ static irqreturn_t at91_adc_rl_interrupt(int irq, void *private)
unsigned int reg;
status &= at91_adc_readl(st, AT91_ADC_IMR);
if (status & st->registers->drdy_mask)
if (status & GENMASK(st->num_channels - 1, 0))
handle_adc_eoc_trigger(irq, idev);
if (status & AT91RL_ADC_IER_PEN) {
@ -418,7 +419,7 @@ static irqreturn_t at91_adc_9x5_interrupt(int irq, void *private)
AT91_ADC_IER_YRDY |
AT91_ADC_IER_PRDY;
if (status & st->registers->drdy_mask)
if (status & GENMASK(st->num_channels - 1, 0))
handle_adc_eoc_trigger(irq, idev);
if (status & AT91_ADC_IER_PEN) {
@ -689,9 +690,10 @@ static int at91_adc_read_raw(struct iio_dev *idev,
case IIO_CHAN_INFO_RAW:
mutex_lock(&st->lock);
st->chnb = chan->channel;
at91_adc_writel(st, AT91_ADC_CHER,
AT91_ADC_CH(chan->channel));
at91_adc_writel(st, AT91_ADC_IER, st->registers->drdy_mask);
at91_adc_writel(st, AT91_ADC_IER, BIT(chan->channel));
at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_START);
ret = wait_event_interruptible_timeout(st->wq_data_avail,
@ -708,7 +710,7 @@ static int at91_adc_read_raw(struct iio_dev *idev,
at91_adc_writel(st, AT91_ADC_CHDR,
AT91_ADC_CH(chan->channel));
at91_adc_writel(st, AT91_ADC_IDR, st->registers->drdy_mask);
at91_adc_writel(st, AT91_ADC_IDR, BIT(chan->channel));
st->last_value = 0;
st->done = false;

2
drivers/iio/adc/xilinx-xadc-core.c
View File

@ -1126,7 +1126,7 @@ static int xadc_parse_dt(struct iio_dev *indio_dev, struct device_node *np,
chan->address = XADC_REG_VPVN;
} else {
chan->scan_index = 15 + reg;
chan->scan_index = XADC_REG_VAUX(reg - 1);
chan->address = XADC_REG_VAUX(reg - 1);
}
num_channels++;
chan++;

3
drivers/iio/common/hid-sensors/hid-sensor-trigger.c
View File

@ -122,7 +122,8 @@ int hid_sensor_setup_trigger(struct iio_dev *indio_dev, const char *name,
dev_err(&indio_dev->dev, "Trigger Register Failed\n");
goto error_free_trig;
}
indio_dev->trig = attrb->trigger = trig;
attrb->trigger = trig;
indio_dev->trig = iio_trigger_get(trig);
return ret;

2
drivers/iio/common/st_sensors/st_sensors_trigger.c
View File

@ -49,7 +49,7 @@ int st_sensors_allocate_trigger(struct iio_dev *indio_dev,
dev_err(&indio_dev->dev, "failed to register iio trigger.\n");
goto iio_trigger_register_error;
}
indio_dev->trig = sdata->trig;
indio_dev->trig = iio_trigger_get(sdata->trig);
return 0;

2
drivers/iio/gyro/itg3200_buffer.c
View File

@ -132,7 +132,7 @@ int itg3200_probe_trigger(struct iio_dev *indio_dev)
goto error_free_irq;
/* select default trigger */
indio_dev->trig = st->trig;
indio_dev->trig = iio_trigger_get(st->trig);
return 0;

2
drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c
View File

@ -135,7 +135,7 @@ int inv_mpu6050_probe_trigger(struct iio_dev *indio_dev)
ret = iio_trigger_register(st->trig);
if (ret)
goto error_free_irq;
indio_dev->trig = st->trig;
indio_dev->trig = iio_trigger_get(st->trig);
return 0;

2
drivers/iio/inkern.c
View File

@ -178,7 +178,7 @@ static struct iio_channel *of_iio_channel_get_by_name(struct device_node *np,
index = of_property_match_string(np, "io-channel-names",
name);
chan = of_iio_channel_get(np, index);
if (!IS_ERR(chan))
if (!IS_ERR(chan) || PTR_ERR(chan) == -EPROBE_DEFER)
break;
else if (name && index >= 0) {
pr_err("ERROR: could not get IIO channel %s:%s(%i)\n",

52
drivers/iio/magnetometer/st_magn_core.c
View File

@ -42,7 +42,8 @@
#define ST_MAGN_FS_AVL_5600MG 5600
#define ST_MAGN_FS_AVL_8000MG 8000
#define ST_MAGN_FS_AVL_8100MG 8100
#define ST_MAGN_FS_AVL_10000MG 10000
#define ST_MAGN_FS_AVL_12000MG 12000
#define ST_MAGN_FS_AVL_16000MG 16000
/* CUSTOM VALUES FOR SENSOR 1 */
#define ST_MAGN_1_WAI_EXP 0x3c
@ -69,20 +70,20 @@
#define ST_MAGN_1_FS_AVL_4700_VAL 0x05
#define ST_MAGN_1_FS_AVL_5600_VAL 0x06
#define ST_MAGN_1_FS_AVL_8100_VAL 0x07
#define ST_MAGN_1_FS_AVL_1300_GAIN_XY 1100
#define ST_MAGN_1_FS_AVL_1900_GAIN_XY 855
#define ST_MAGN_1_FS_AVL_2500_GAIN_XY 670
#define ST_MAGN_1_FS_AVL_4000_GAIN_XY 450
#define ST_MAGN_1_FS_AVL_4700_GAIN_XY 400
#define ST_MAGN_1_FS_AVL_5600_GAIN_XY 330
#define ST_MAGN_1_FS_AVL_8100_GAIN_XY 230
#define ST_MAGN_1_FS_AVL_1300_GAIN_Z 980
#define ST_MAGN_1_FS_AVL_1900_GAIN_Z 760
#define ST_MAGN_1_FS_AVL_2500_GAIN_Z 600
#define ST_MAGN_1_FS_AVL_4000_GAIN_Z 400
#define ST_MAGN_1_FS_AVL_4700_GAIN_Z 355
#define ST_MAGN_1_FS_AVL_5600_GAIN_Z 295
#define ST_MAGN_1_FS_AVL_8100_GAIN_Z 205
#define ST_MAGN_1_FS_AVL_1300_GAIN_XY 909
#define ST_MAGN_1_FS_AVL_1900_GAIN_XY 1169
#define ST_MAGN_1_FS_AVL_2500_GAIN_XY 1492
#define ST_MAGN_1_FS_AVL_4000_GAIN_XY 2222
#define ST_MAGN_1_FS_AVL_4700_GAIN_XY 2500
#define ST_MAGN_1_FS_AVL_5600_GAIN_XY 3030
#define ST_MAGN_1_FS_AVL_8100_GAIN_XY 4347
#define ST_MAGN_1_FS_AVL_1300_GAIN_Z 1020
#define ST_MAGN_1_FS_AVL_1900_GAIN_Z 1315
#define ST_MAGN_1_FS_AVL_2500_GAIN_Z 1666
#define ST_MAGN_1_FS_AVL_4000_GAIN_Z 2500
#define ST_MAGN_1_FS_AVL_4700_GAIN_Z 2816
#define ST_MAGN_1_FS_AVL_5600_GAIN_Z 3389
#define ST_MAGN_1_FS_AVL_8100_GAIN_Z 4878
#define ST_MAGN_1_MULTIREAD_BIT false
/* CUSTOM VALUES FOR SENSOR 2 */
@ -105,10 +106,12 @@
#define ST_MAGN_2_FS_MASK 0x60
#define ST_MAGN_2_FS_AVL_4000_VAL 0x00
#define ST_MAGN_2_FS_AVL_8000_VAL 0x01
#define ST_MAGN_2_FS_AVL_10000_VAL 0x02
#define ST_MAGN_2_FS_AVL_4000_GAIN 430
#define ST_MAGN_2_FS_AVL_8000_GAIN 230
#define ST_MAGN_2_FS_AVL_10000_GAIN 230
#define ST_MAGN_2_FS_AVL_12000_VAL 0x02
#define ST_MAGN_2_FS_AVL_16000_VAL 0x03
#define ST_MAGN_2_FS_AVL_4000_GAIN 146
#define ST_MAGN_2_FS_AVL_8000_GAIN 292
#define ST_MAGN_2_FS_AVL_12000_GAIN 438
#define ST_MAGN_2_FS_AVL_16000_GAIN 584
#define ST_MAGN_2_MULTIREAD_BIT false
#define ST_MAGN_2_OUT_X_L_ADDR 0x28
#define ST_MAGN_2_OUT_Y_L_ADDR 0x2a
@ -266,9 +269,14 @@ static const struct st_sensors st_magn_sensors[] = {
.gain = ST_MAGN_2_FS_AVL_8000_GAIN,
},
[2] = {
.num = ST_MAGN_FS_AVL_10000MG,
.value = ST_MAGN_2_FS_AVL_10000_VAL,
.gain = ST_MAGN_2_FS_AVL_10000_GAIN,
.num = ST_MAGN_FS_AVL_12000MG,
.value = ST_MAGN_2_FS_AVL_12000_VAL,
.gain = ST_MAGN_2_FS_AVL_12000_GAIN,
},
[3] = {
.num = ST_MAGN_FS_AVL_16000MG,
.value = ST_MAGN_2_FS_AVL_16000_VAL,
.gain = ST_MAGN_2_FS_AVL_16000_GAIN,
},
},
},

20
drivers/infiniband/ulp/isert/ib_isert.c
View File

@ -586,17 +586,12 @@ isert_connect_request(struct rdma_cm_id *cma_id, struct rdma_cm_event *event)
init_completion(&isert_conn->conn_wait);
init_completion(&isert_conn->conn_wait_comp_err);
kref_init(&isert_conn->conn_kref);
kref_get(&isert_conn->conn_kref);
mutex_init(&isert_conn->conn_mutex);
spin_lock_init(&isert_conn->conn_lock);
INIT_LIST_HEAD(&isert_conn->conn_fr_pool);
cma_id->context = isert_conn;
isert_conn->conn_cm_id = cma_id;
isert_conn->responder_resources = event->param.conn.responder_resources;
isert_conn->initiator_depth = event->param.conn.initiator_depth;
pr_debug("Using responder_resources: %u initiator_depth: %u\n",
isert_conn->responder_resources, isert_conn->initiator_depth);
isert_conn->login_buf = kzalloc(ISCSI_DEF_MAX_RECV_SEG_LEN +
ISER_RX_LOGIN_SIZE, GFP_KERNEL);
@ -643,6 +638,12 @@ isert_connect_request(struct rdma_cm_id *cma_id, struct rdma_cm_event *event)
goto out_rsp_dma_map;
}
/* Set max inflight RDMA READ requests */
isert_conn->initiator_depth = min_t(u8,
event->param.conn.initiator_depth,
device->dev_attr.max_qp_init_rd_atom);
pr_debug("Using initiator_depth: %u\n", isert_conn->initiator_depth);
isert_conn->conn_device = device;
isert_conn->conn_pd = ib_alloc_pd(isert_conn->conn_device->ib_device);
if (IS_ERR(isert_conn->conn_pd)) {
@ -746,7 +747,9 @@ isert_connect_release(struct isert_conn *isert_conn)
static void
isert_connected_handler(struct rdma_cm_id *cma_id)
{
return;
struct isert_conn *isert_conn = cma_id->context;
kref_get(&isert_conn->conn_kref);
}
static void
@ -798,7 +801,6 @@ isert_disconnect_work(struct work_struct *work)
wake_up:
complete(&isert_conn->conn_wait);
isert_put_conn(isert_conn);
}
static void
@ -3067,7 +3069,6 @@ isert_rdma_accept(struct isert_conn *isert_conn)
int ret;
memset(&cp, 0, sizeof(struct rdma_conn_param));
cp.responder_resources = isert_conn->responder_resources;
cp.initiator_depth = isert_conn->initiator_depth;
cp.retry_count = 7;
cp.rnr_retry_count = 7;
@ -3215,7 +3216,7 @@ static void isert_wait_conn(struct iscsi_conn *conn)
pr_debug("isert_wait_conn: Starting \n");
mutex_lock(&isert_conn->conn_mutex);
if (isert_conn->conn_cm_id) {
if (isert_conn->conn_cm_id && !isert_conn->disconnect) {
pr_debug("Calling rdma_disconnect from isert_wait_conn\n");
rdma_disconnect(isert_conn->conn_cm_id);
}
@ -3234,6 +3235,7 @@ static void isert_wait_conn(struct iscsi_conn *conn)
wait_for_completion(&isert_conn->conn_wait_comp_err);
wait_for_completion(&isert_conn->conn_wait);
isert_put_conn(isert_conn);
}
static void isert_free_conn(struct iscsi_conn *conn)

8
drivers/input/keyboard/atkbd.c
View File

@ -1791,14 +1791,6 @@ static const struct dmi_system_id atkbd_dmi_quirk_table[] __initconst = {
{
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "LG Electronics"),
DMI_MATCH(DMI_PRODUCT_NAME, "LW25-B7HV"),
},
.callback = atkbd_deactivate_fixup,
},
{
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "LG Electronics"),
DMI_MATCH(DMI_PRODUCT_NAME, "P1-J273B"),
},
.callback = atkbd_deactivate_fixup,
},

15
drivers/input/serio/i8042-x86ia64io.h
View File

@ -465,6 +465,13 @@ static const struct dmi_system_id __initconst i8042_dmi_nomux_table[] = {
DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv4 Notebook PC"),
},
},
{
/* Avatar AVIU-145A6 */
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Intel"),
DMI_MATCH(DMI_PRODUCT_NAME, "IC4I"),
},
},
{ }
};
@ -608,6 +615,14 @@ static const struct dmi_system_id __initconst i8042_dmi_notimeout_table[] = {
DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv4 Notebook PC"),
},
},
{
/* Fujitsu U574 laptop */
/* https://bugzilla.kernel.org/show_bug.cgi?id=69731 */
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
DMI_MATCH(DMI_PRODUCT_NAME, "LIFEBOOK U574"),
},
},
{ }
};

2
drivers/input/serio/i8042.c
View File

@ -1254,6 +1254,8 @@ static int __init i8042_create_aux_port(int idx)
} else {
snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
strlcpy(serio->firmware_id, i8042_aux_firmware_id,
sizeof(serio->firmware_id));
}
port->serio = serio;

1
drivers/media/Kconfig
View File

@ -182,7 +182,6 @@ config MEDIA_SUBDRV_AUTOSELECT
depends on HAS_IOMEM
select I2C
select I2C_MUX
select SPI
default y
help
By default, a media driver auto-selects all possible ancillary

2
drivers/media/dvb-core/dvb-usb-ids.h
View File

@ -280,6 +280,8 @@
#define USB_PID_PCTV_400E 0x020f
#define USB_PID_PCTV_450E 0x0222
#define USB_PID_PCTV_452E 0x021f
#define USB_PID_PCTV_78E 0x025a
#define USB_PID_PCTV_79E 0x0262
#define USB_PID_REALTEK_RTL2831U 0x2831
#define USB_PID_REALTEK_RTL2832U 0x2832
#define USB_PID_TECHNOTREND_CONNECT_S2_3600 0x3007

13
drivers/media/dvb-frontends/af9033.c
View File

@ -314,6 +314,19 @@ static int af9033_init(struct dvb_frontend *fe)
goto err;
}
/* feed clock to RF tuner */
switch (state->cfg.tuner) {
case AF9033_TUNER_IT9135_38:
case AF9033_TUNER_IT9135_51:
case AF9033_TUNER_IT9135_52:
case AF9033_TUNER_IT9135_60:
case AF9033_TUNER_IT9135_61:
case AF9033_TUNER_IT9135_62:
ret = af9033_wr_reg(state, 0x80fba8, 0x00);
if (ret < 0)
goto err;
}
/* settings for TS interface */
if (state->cfg.ts_mode == AF9033_TS_MODE_USB) {
ret = af9033_wr_reg_mask(state, 0x80f9a5, 0x00, 0x01);

20
drivers/media/dvb-frontends/af9033_priv.h
View File

@ -1418,7 +1418,7 @@ static const struct reg_val tuner_init_it9135_60[] = {
{ 0x800068, 0x0a },
{ 0x80006a, 0x03 },
{ 0x800070, 0x0a },
{ 0x800071, 0x05 },
{ 0x800071, 0x0a },
{ 0x800072, 0x02 },
{ 0x800075, 0x8c },
{ 0x800076, 0x8c },
@ -1484,7 +1484,6 @@ static const struct reg_val tuner_init_it9135_60[] = {
{ 0x800104, 0x02 },
{ 0x800105, 0xbe },
{ 0x800106, 0x00 },
{ 0x800109, 0x02 },
{ 0x800115, 0x0a },
{ 0x800116, 0x03 },
{ 0x80011a, 0xbe },
@ -1510,7 +1509,6 @@ static const struct reg_val tuner_init_it9135_60[] = {
{ 0x80014b, 0x8c },
{ 0x80014d, 0xac },
{ 0x80014e, 0xc6 },
{ 0x80014f, 0x03 },
{ 0x800151, 0x1e },
{ 0x800153, 0xbc },
{ 0x800178, 0x09 },
@ -1522,9 +1520,10 @@ static const struct reg_val tuner_init_it9135_60[] = {
{ 0x80018d, 0x5f },
{ 0x80018f, 0xa0 },
{ 0x800190, 0x5a },
{ 0x80ed02, 0xff },
{ 0x80ee42, 0xff },
{ 0x80ee82, 0xff },
{ 0x800191, 0x00 },
{ 0x80ed02, 0x40 },
{ 0x80ee42, 0x40 },
{ 0x80ee82, 0x40 },
{ 0x80f000, 0x0f },
{ 0x80f01f, 0x8c },
{ 0x80f020, 0x00 },
@ -1699,7 +1698,6 @@ static const struct reg_val tuner_init_it9135_61[] = {
{ 0x800104, 0x02 },
{ 0x800105, 0xc8 },
{ 0x800106, 0x00 },
{ 0x800109, 0x02 },
{ 0x800115, 0x0a },
{ 0x800116, 0x03 },
{ 0x80011a, 0xc6 },
@ -1725,7 +1723,6 @@ static const struct reg_val tuner_init_it9135_61[] = {
{ 0x80014b, 0x8c },
{ 0x80014d, 0xa8 },
{ 0x80014e, 0xc6 },
{ 0x80014f, 0x03 },
{ 0x800151, 0x28 },
{ 0x800153, 0xcc },
{ 0x800178, 0x09 },
@ -1737,9 +1734,10 @@ static const struct reg_val tuner_init_it9135_61[] = {
{ 0x80018d, 0x5f },
{ 0x80018f, 0xfb },
{ 0x800190, 0x5c },
{ 0x80ed02, 0xff },
{ 0x80ee42, 0xff },
{ 0x80ee82, 0xff },
{ 0x800191, 0x00 },
{ 0x80ed02, 0x40 },
{ 0x80ee42, 0x40 },
{ 0x80ee82, 0x40 },
{ 0x80f000, 0x0f },
{ 0x80f01f, 0x8c },
{ 0x80f020, 0x00 },

13
drivers/media/i2c/smiapp/smiapp-core.c
View File

@ -1282,19 +1282,12 @@ static int smiapp_set_power(struct v4l2_subdev *subdev, int on)
mutex_lock(&sensor->power_mutex);
/*
* If the power count is modified from 0 to != 0 or from != 0
* to 0, update the power state.
*/
if (!sensor->power_count == !on)
goto out;
if (on) {
if (on && !sensor->power_count) {
/* Power on and perform initialisation. */
ret = smiapp_power_on(sensor);
if (ret < 0)
goto out;
} else {
} else if (!on && sensor->power_count == 1) {
smiapp_power_off(sensor);
}
@ -2572,7 +2565,7 @@ static int smiapp_registered(struct v4l2_subdev *subdev)
this->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
this->sd.internal_ops = &smiapp_internal_ops;
this->sd.owner = NULL;
this->sd.owner = THIS_MODULE;
v4l2_set_subdevdata(&this->sd, client);
rval = media_entity_init(&this->sd.entity,

1
drivers/media/pci/cx18/cx18-driver.c
View File

@ -1091,6 +1091,7 @@ static int cx18_probe(struct pci_dev *pci_dev,
setup.addr = ADDR_UNSET;
setup.type = cx->options.tuner;
setup.mode_mask = T_ANALOG_TV; /* matches TV tuners */
setup.config = NULL;
if (cx->options.radio > 0)
setup.mode_mask |= T_RADIO;
setup.tuner_callback = (setup.type == TUNER_XC2028) ?

6
drivers/media/tuners/tuner_it913x.c
View File

@ -396,6 +396,7 @@ struct dvb_frontend *it913x_attach(struct dvb_frontend *fe,
struct i2c_adapter *i2c_adap, u8 i2c_addr, u8 config)
{
struct it913x_state *state = NULL;
int ret;
/* allocate memory for the internal state */
state = kzalloc(sizeof(struct it913x_state), GFP_KERNEL);
@ -425,6 +426,11 @@ struct dvb_frontend *it913x_attach(struct dvb_frontend *fe,
state->tuner_type = config;
state->firmware_ver = 1;
/* tuner RF initial */
ret = it913x_wr_reg(state, PRO_DMOD, 0xec4c, 0x68);
if (ret < 0)
goto error;
fe->tuner_priv = state;
memcpy(&fe->ops.tuner_ops, &it913x_tuner_ops,
sizeof(struct dvb_tuner_ops));

4
drivers/media/usb/dvb-usb-v2/af9035.c
View File

@ -1575,6 +1575,10 @@ static const struct usb_device_id af9035_id_table[] = {
&af9035_props, "Leadtek WinFast DTV Dongle Dual", NULL) },
{ DVB_USB_DEVICE(USB_VID_HAUPPAUGE, 0xf900,
&af9035_props, "Hauppauge WinTV-MiniStick 2", NULL) },
{ DVB_USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_78E,
&af9035_props, "PCTV 78e", RC_MAP_IT913X_V1) },
{ DVB_USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_79E,
&af9035_props, "PCTV 79e", RC_MAP_IT913X_V2) },
{ }
};
MODULE_DEVICE_TABLE(usb, af9035_id_table);

38
drivers/pci/host/pci-imx6.c
View File

@ -49,6 +49,9 @@ struct imx6_pcie {
/* PCIe Port Logic registers (memory-mapped) */
#define PL_OFFSET 0x700
#define PCIE_PL_PFLR (PL_OFFSET + 0x08)
#define PCIE_PL_PFLR_LINK_STATE_MASK (0x3f << 16)
#define PCIE_PL_PFLR_FORCE_LINK (1 << 15)
#define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
#define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
#define PCIE_PHY_DEBUG_R1_XMLH_LINK_IN_TRAINING (1 << 29)
@ -214,6 +217,32 @@ static int imx6q_pcie_abort_handler(unsigned long addr,
static int imx6_pcie_assert_core_reset(struct pcie_port *pp)
{
struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
u32 val, gpr1, gpr12;
/*
* If the bootloader already enabled the link we need some special
* handling to get the core back into a state where it is safe to
* touch it for configuration. As there is no dedicated reset signal
* wired up for MX6QDL, we need to manually force LTSSM into "detect"
* state before completely disabling LTSSM, which is a prerequisite
* for core configuration.
*
* If both LTSSM_ENABLE and REF_SSP_ENABLE are active we have a strong
* indication that the bootloader activated the link.
*/
regmap_read(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, &gpr1);
regmap_read(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, &gpr12);
if ((gpr1 & IMX6Q_GPR1_PCIE_REF_CLK_EN) &&
(gpr12 & IMX6Q_GPR12_PCIE_CTL_2)) {
val = readl(pp->dbi_base + PCIE_PL_PFLR);
val &= ~PCIE_PL_PFLR_LINK_STATE_MASK;
val |= PCIE_PL_PFLR_FORCE_LINK;
writel(val, pp->dbi_base + PCIE_PL_PFLR);
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX6Q_GPR12_PCIE_CTL_2, 0 << 10);
}
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
IMX6Q_GPR1_PCIE_TEST_PD, 1 << 18);
@ -589,6 +618,14 @@ static int __init imx6_pcie_probe(struct platform_device *pdev)
return 0;
}
static void imx6_pcie_shutdown(struct platform_device *pdev)
{
struct imx6_pcie *imx6_pcie = platform_get_drvdata(pdev);
/* bring down link, so bootloader gets clean state in case of reboot */
imx6_pcie_assert_core_reset(&imx6_pcie->pp);
}
static const struct of_device_id imx6_pcie_of_match[] = {
{ .compatible = "fsl,imx6q-pcie", },
{},
@ -601,6 +638,7 @@ static struct platform_driver imx6_pcie_driver = {
.owner = THIS_MODULE,
.of_match_table = imx6_pcie_of_match,
},
.shutdown = imx6_pcie_shutdown,
};
/* Freescale PCIe driver does not allow module unload */

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