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- build fix for ZSTD enabled configs

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- fix for preempt warning
 - fix for loongson FTLB detection
 - fix for page table level selection
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Merge tag 'mips-fixes_5.16_2' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS fixes from Thomas Bogendoerfer:

 - build fix for ZSTD enabled configs

 - fix for preempt warning

 - fix for loongson FTLB detection

 - fix for page table level selection

* tag 'mips-fixes_5.16_2' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
  MIPS: use 3-level pgtable for 64KB page size on MIPS_VA_BITS_48
  MIPS: loongson64: fix FTLB configuration
  MIPS: Fix using smp_processor_id() in preemptible in show_cpuinfo()
  MIPS: boot/compressed/: add __ashldi3 to target for ZSTD compression
This commit is contained in:
Linus Torvalds 2021-11-27 09:50:31 -08:00
commit 6be088036c
4 changed files with 5 additions and 5 deletions
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2
arch/mips/Kconfig
View File

@ -3097,7 +3097,7 @@ config STACKTRACE_SUPPORT
config PGTABLE_LEVELS config PGTABLE_LEVELS
int int
default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
default 3 if 64BIT && !PAGE_SIZE_64KB default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
default 2 default 2
config MIPS_AUTO_PFN_OFFSET config MIPS_AUTO_PFN_OFFSET

2
arch/mips/boot/compressed/Makefile
View File

@ -52,7 +52,7 @@ endif
vmlinuzobjs-$(CONFIG_KERNEL_XZ) += $(obj)/ashldi3.o vmlinuzobjs-$(CONFIG_KERNEL_XZ) += $(obj)/ashldi3.o
vmlinuzobjs-$(CONFIG_KERNEL_ZSTD) += $(obj)/bswapdi.o vmlinuzobjs-$(CONFIG_KERNEL_ZSTD) += $(obj)/bswapdi.o $(obj)/ashldi3.o
targets := $(notdir $(vmlinuzobjs-y)) targets := $(notdir $(vmlinuzobjs-y))

4
arch/mips/kernel/cpu-probe.c
View File

@ -1734,8 +1734,6 @@ static inline void decode_cpucfg(struct cpuinfo_mips *c)
static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
{ {
decode_configs(c);
/* All Loongson processors covered here define ExcCode 16 as GSExc. */ /* All Loongson processors covered here define ExcCode 16 as GSExc. */
c->options |= MIPS_CPU_GSEXCEX; c->options |= MIPS_CPU_GSEXCEX;
@ -1796,6 +1794,8 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
panic("Unknown Loongson Processor ID!"); panic("Unknown Loongson Processor ID!");
break; break;
} }
decode_configs(c);
} }
#else #else
static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) { } static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) { }

2
arch/mips/kernel/proc.c
View File

@ -185,7 +185,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
seq_puts(m, " tx39_cache"); seq_puts(m, " tx39_cache");
if (cpu_has_octeon_cache) if (cpu_has_octeon_cache)
seq_puts(m, " octeon_cache"); seq_puts(m, " octeon_cache");
if (cpu_has_fpu) if (raw_cpu_has_fpu)
seq_puts(m, " fpu"); seq_puts(m, " fpu");
if (cpu_has_32fpr) if (cpu_has_32fpr)
seq_puts(m, " 32fpr"); seq_puts(m, " 32fpr");