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net/mlx5e: Isolate open_channels from priv->params

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In order to have a clean separation between channels resources creation
flows and current active mlx5e netdev parameters, make sure each
resource creation function do not access priv->params, and only works
with on a new fresh set of parameters.

For this we add "new" mlx5e_params field to mlx5e_channels structure
and use it down the road to mlx5e_open_{cq,rq,sq} and so on.

Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Reviewed-by: Tariq Toukan <tariqt@mellanox.com>
This commit is contained in:
Saeed Mahameed 2016-12-21 17:24:35 +02:00
parent acc6c5953a
commit 6a9764efb2
8 changed files with 339 additions and 352 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
drivers/net/ethernet/mellanox/mlx5/core/en.h
View File

@ -182,15 +182,15 @@ enum mlx5e_priv_flag {
MLX5E_PFLAG_RX_CQE_COMPRESS = (1 << 1), MLX5E_PFLAG_RX_CQE_COMPRESS = (1 << 1),
}; };
#define MLX5E_SET_PFLAG(priv, pflag, enable) \ #define MLX5E_SET_PFLAG(params, pflag, enable) \
do { \ do { \
if (enable) \ if (enable) \
(priv)->params.pflags |= (pflag); \ (params)->pflags |= (pflag); \
else \ else \
(priv)->params.pflags &= ~(pflag); \ (params)->pflags &= ~(pflag); \
} while (0) } while (0)
#define MLX5E_GET_PFLAG(priv, pflag) (!!((priv)->params.pflags & (pflag))) #define MLX5E_GET_PFLAG(params, pflag) (!!((params)->pflags & (pflag)))
#ifdef CONFIG_MLX5_CORE_EN_DCB #ifdef CONFIG_MLX5_CORE_EN_DCB
#define MLX5E_MAX_BW_ALLOC 100 /* Max percentage of BW allocation */ #define MLX5E_MAX_BW_ALLOC 100 /* Max percentage of BW allocation */
@ -213,7 +213,6 @@ struct mlx5e_params {
bool rx_cqe_compress_def; bool rx_cqe_compress_def;
struct mlx5e_cq_moder rx_cq_moderation; struct mlx5e_cq_moder rx_cq_moderation;
struct mlx5e_cq_moder tx_cq_moderation; struct mlx5e_cq_moder tx_cq_moderation;
u16 min_rx_wqes;
bool lro_en; bool lro_en;
u32 lro_wqe_sz; u32 lro_wqe_sz;
u16 tx_max_inline; u16 tx_max_inline;
@ -225,6 +224,7 @@ struct mlx5e_params {
bool rx_am_enabled; bool rx_am_enabled;
u32 lro_timeout; u32 lro_timeout;
u32 pflags; u32 pflags;
struct bpf_prog *xdp_prog;
}; };
#ifdef CONFIG_MLX5_CORE_EN_DCB #ifdef CONFIG_MLX5_CORE_EN_DCB
@ -357,7 +357,6 @@ struct mlx5e_txqsq {
/* control path */ /* control path */
struct mlx5_wq_ctrl wq_ctrl; struct mlx5_wq_ctrl wq_ctrl;
struct mlx5e_channel *channel; struct mlx5e_channel *channel;
int tc;
int txq_ix; int txq_ix;
u32 rate_limit; u32 rate_limit;
} ____cacheline_aligned_in_smp; } ____cacheline_aligned_in_smp;
@ -564,6 +563,7 @@ struct mlx5e_channel {
struct mlx5e_channels { struct mlx5e_channels {
struct mlx5e_channel **c; struct mlx5e_channel **c;
unsigned int num; unsigned int num;
struct mlx5e_params params;
}; };
enum mlx5e_traffic_types { enum mlx5e_traffic_types {
@ -735,7 +735,6 @@ struct mlx5e_priv {
/* priv data path fields - start */ /* priv data path fields - start */
struct mlx5e_txqsq *txq2sq[MLX5E_MAX_NUM_CHANNELS * MLX5E_MAX_NUM_TC]; struct mlx5e_txqsq *txq2sq[MLX5E_MAX_NUM_CHANNELS * MLX5E_MAX_NUM_TC];
int channel_tc2txq[MLX5E_MAX_NUM_CHANNELS][MLX5E_MAX_NUM_TC]; int channel_tc2txq[MLX5E_MAX_NUM_CHANNELS][MLX5E_MAX_NUM_TC];
struct bpf_prog *xdp_prog;
/* priv data path fields - end */ /* priv data path fields - end */
unsigned long state; unsigned long state;
@ -752,7 +751,6 @@ struct mlx5e_priv {
struct mlx5e_flow_steering fs; struct mlx5e_flow_steering fs;
struct mlx5e_vxlan_db vxlan; struct mlx5e_vxlan_db vxlan;
struct mlx5e_params params;
struct workqueue_struct *wq; struct workqueue_struct *wq;
struct work_struct update_carrier_work; struct work_struct update_carrier_work;
struct work_struct set_rx_mode_work; struct work_struct set_rx_mode_work;
@ -857,8 +855,9 @@ struct mlx5e_redirect_rqt_param {
int mlx5e_redirect_rqt(struct mlx5e_priv *priv, u32 rqtn, int sz, int mlx5e_redirect_rqt(struct mlx5e_priv *priv, u32 rqtn, int sz,
struct mlx5e_redirect_rqt_param rrp); struct mlx5e_redirect_rqt_param rrp);
void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_priv *priv, void *tirc, void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_params *params,
enum mlx5e_traffic_types tt); enum mlx5e_traffic_types tt,
void *tirc);
int mlx5e_open_locked(struct net_device *netdev); int mlx5e_open_locked(struct net_device *netdev);
int mlx5e_close_locked(struct net_device *netdev); int mlx5e_close_locked(struct net_device *netdev);
@ -869,7 +868,8 @@ int mlx5e_get_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);
void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params, void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params,
u8 cq_period_mode); u8 cq_period_mode);
void mlx5e_set_rq_type_params(struct mlx5e_priv *priv, u8 rq_type); void mlx5e_set_rq_type_params(struct mlx5_core_dev *mdev,
struct mlx5e_params *params, u8 rq_type);
static inline static inline
struct mlx5e_tx_wqe *mlx5e_post_nop(struct mlx5_wq_cyc *wq, u32 sqn, u16 *pc) struct mlx5e_tx_wqe *mlx5e_post_nop(struct mlx5_wq_cyc *wq, u32 sqn, u16 *pc)

2
drivers/net/ethernet/mellanox/mlx5/core/en_clock.c
View File

@ -111,7 +111,7 @@ int mlx5e_hwstamp_set(struct net_device *dev, struct ifreq *ifr)
switch (config.rx_filter) { switch (config.rx_filter) {
case HWTSTAMP_FILTER_NONE: case HWTSTAMP_FILTER_NONE:
/* Reset CQE compression to Admin default */ /* Reset CQE compression to Admin default */
mlx5e_modify_rx_cqe_compression_locked(priv, priv->params.rx_cqe_compress_def); mlx5e_modify_rx_cqe_compression_locked(priv, priv->channels.params.rx_cqe_compress_def);
break; break;
case HWTSTAMP_FILTER_ALL: case HWTSTAMP_FILTER_ALL:
case HWTSTAMP_FILTER_SOME: case HWTSTAMP_FILTER_SOME:

119
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
View File

@ -154,7 +154,7 @@ static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv)
#define MLX5E_NUM_Q_CNTRS(priv) (NUM_Q_COUNTERS * (!!priv->q_counter)) #define MLX5E_NUM_Q_CNTRS(priv) (NUM_Q_COUNTERS * (!!priv->q_counter))
#define MLX5E_NUM_RQ_STATS(priv) (NUM_RQ_STATS * (priv)->channels.num) #define MLX5E_NUM_RQ_STATS(priv) (NUM_RQ_STATS * (priv)->channels.num)
#define MLX5E_NUM_SQ_STATS(priv) \ #define MLX5E_NUM_SQ_STATS(priv) \
(NUM_SQ_STATS * (priv)->channels.num * (priv)->params.num_tc) (NUM_SQ_STATS * (priv)->channels.num * (priv)->channels.params.num_tc)
#define MLX5E_NUM_PFC_COUNTERS(priv) \ #define MLX5E_NUM_PFC_COUNTERS(priv) \
((mlx5e_query_global_pause_combined(priv) + hweight8(mlx5e_query_pfc_combined(priv))) * \ ((mlx5e_query_global_pause_combined(priv) + hweight8(mlx5e_query_pfc_combined(priv))) * \
NUM_PPORT_PER_PRIO_PFC_COUNTERS) NUM_PPORT_PER_PRIO_PFC_COUNTERS)
@ -264,7 +264,7 @@ static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, uint8_t *data)
sprintf(data + (idx++) * ETH_GSTRING_LEN, sprintf(data + (idx++) * ETH_GSTRING_LEN,
rq_stats_desc[j].format, i); rq_stats_desc[j].format, i);
for (tc = 0; tc < priv->params.num_tc; tc++) for (tc = 0; tc < priv->channels.params.num_tc; tc++)
for (i = 0; i < priv->channels.num; i++) for (i = 0; i < priv->channels.num; i++)
for (j = 0; j < NUM_SQ_STATS; j++) for (j = 0; j < NUM_SQ_STATS; j++)
sprintf(data + (idx++) * ETH_GSTRING_LEN, sprintf(data + (idx++) * ETH_GSTRING_LEN,
@ -387,7 +387,7 @@ static void mlx5e_get_ethtool_stats(struct net_device *dev,
MLX5E_READ_CTR64_CPU(&channels->c[i]->rq.stats, MLX5E_READ_CTR64_CPU(&channels->c[i]->rq.stats,
rq_stats_desc, j); rq_stats_desc, j);
for (tc = 0; tc < priv->params.num_tc; tc++) for (tc = 0; tc < priv->channels.params.num_tc; tc++)
for (i = 0; i < channels->num; i++) for (i = 0; i < channels->num; i++)
for (j = 0; j < NUM_SQ_STATS; j++) for (j = 0; j < NUM_SQ_STATS; j++)
data[idx++] = MLX5E_READ_CTR64_CPU(&channels->c[i]->sq[tc].stats, data[idx++] = MLX5E_READ_CTR64_CPU(&channels->c[i]->sq[tc].stats,
@ -405,8 +405,8 @@ static u32 mlx5e_rx_wqes_to_packets(struct mlx5e_priv *priv, int rq_wq_type,
if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ) if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
return num_wqe; return num_wqe;
stride_size = 1 << priv->params.mpwqe_log_stride_sz; stride_size = 1 << priv->channels.params.mpwqe_log_stride_sz;
num_strides = 1 << priv->params.mpwqe_log_num_strides; num_strides = 1 << priv->channels.params.mpwqe_log_num_strides;
wqe_size = stride_size * num_strides; wqe_size = stride_size * num_strides;
packets_per_wqe = wqe_size / packets_per_wqe = wqe_size /
@ -426,8 +426,8 @@ static u32 mlx5e_packets_to_rx_wqes(struct mlx5e_priv *priv, int rq_wq_type,
if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ) if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
return num_packets; return num_packets;
stride_size = 1 << priv->params.mpwqe_log_stride_sz; stride_size = 1 << priv->channels.params.mpwqe_log_stride_sz;
num_strides = 1 << priv->params.mpwqe_log_num_strides; num_strides = 1 << priv->channels.params.mpwqe_log_num_strides;
wqe_size = stride_size * num_strides; wqe_size = stride_size * num_strides;
num_packets = (1 << order_base_2(num_packets)); num_packets = (1 << order_base_2(num_packets));
@ -442,26 +442,25 @@ static void mlx5e_get_ringparam(struct net_device *dev,
struct ethtool_ringparam *param) struct ethtool_ringparam *param)
{ {
struct mlx5e_priv *priv = netdev_priv(dev); struct mlx5e_priv *priv = netdev_priv(dev);
int rq_wq_type = priv->params.rq_wq_type; int rq_wq_type = priv->channels.params.rq_wq_type;
param->rx_max_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type, param->rx_max_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
1 << mlx5_max_log_rq_size(rq_wq_type)); 1 << mlx5_max_log_rq_size(rq_wq_type));
param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE; param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
param->rx_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type, param->rx_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
1 << priv->params.log_rq_size); 1 << priv->channels.params.log_rq_size);
param->tx_pending = 1 << priv->params.log_sq_size; param->tx_pending = 1 << priv->channels.params.log_sq_size;
} }
static int mlx5e_set_ringparam(struct net_device *dev, static int mlx5e_set_ringparam(struct net_device *dev,
struct ethtool_ringparam *param) struct ethtool_ringparam *param)
{ {
struct mlx5e_priv *priv = netdev_priv(dev); struct mlx5e_priv *priv = netdev_priv(dev);
bool was_opened; int rq_wq_type = priv->channels.params.rq_wq_type;
int rq_wq_type = priv->params.rq_wq_type;
u32 rx_pending_wqes; u32 rx_pending_wqes;
bool was_opened;
u32 min_rq_size; u32 min_rq_size;
u32 max_rq_size; u32 max_rq_size;
u16 min_rx_wqes;
u8 log_rq_size; u8 log_rq_size;
u8 log_sq_size; u8 log_sq_size;
u32 num_mtts; u32 num_mtts;
@ -499,7 +498,7 @@ static int mlx5e_set_ringparam(struct net_device *dev,
} }
num_mtts = MLX5E_REQUIRED_MTTS(rx_pending_wqes); num_mtts = MLX5E_REQUIRED_MTTS(rx_pending_wqes);
if (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ && if (priv->channels.params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&
!MLX5E_VALID_NUM_MTTS(num_mtts)) { !MLX5E_VALID_NUM_MTTS(num_mtts)) {
netdev_info(dev, "%s: rx_pending (%d) request can't be satisfied, try to reduce.\n", netdev_info(dev, "%s: rx_pending (%d) request can't be satisfied, try to reduce.\n",
__func__, param->rx_pending); __func__, param->rx_pending);
@ -521,11 +520,9 @@ static int mlx5e_set_ringparam(struct net_device *dev,
log_rq_size = order_base_2(rx_pending_wqes); log_rq_size = order_base_2(rx_pending_wqes);
log_sq_size = order_base_2(param->tx_pending); log_sq_size = order_base_2(param->tx_pending);
min_rx_wqes = mlx5_min_rx_wqes(rq_wq_type, rx_pending_wqes);
if (log_rq_size == priv->params.log_rq_size && if (log_rq_size == priv->channels.params.log_rq_size &&
log_sq_size == priv->params.log_sq_size && log_sq_size == priv->channels.params.log_sq_size)
min_rx_wqes == priv->params.min_rx_wqes)
return 0; return 0;
mutex_lock(&priv->state_lock); mutex_lock(&priv->state_lock);
@ -534,9 +531,8 @@ static int mlx5e_set_ringparam(struct net_device *dev,
if (was_opened) if (was_opened)
mlx5e_close_locked(dev); mlx5e_close_locked(dev);
priv->params.log_rq_size = log_rq_size; priv->channels.params.log_rq_size = log_rq_size;
priv->params.log_sq_size = log_sq_size; priv->channels.params.log_sq_size = log_sq_size;
priv->params.min_rx_wqes = min_rx_wqes;
if (was_opened) if (was_opened)
err = mlx5e_open_locked(dev); err = mlx5e_open_locked(dev);
@ -552,7 +548,7 @@ static void mlx5e_get_channels(struct net_device *dev,
struct mlx5e_priv *priv = netdev_priv(dev); struct mlx5e_priv *priv = netdev_priv(dev);
ch->max_combined = priv->profile->max_nch(priv->mdev); ch->max_combined = priv->profile->max_nch(priv->mdev);
ch->combined_count = priv->params.num_channels; ch->combined_count = priv->channels.params.num_channels;
} }
static int mlx5e_set_channels(struct net_device *dev, static int mlx5e_set_channels(struct net_device *dev,
@ -570,7 +566,7 @@ static int mlx5e_set_channels(struct net_device *dev,
return -EINVAL; return -EINVAL;
} }
if (priv->params.num_channels == count) if (priv->channels.params.num_channels == count)
return 0; return 0;
mutex_lock(&priv->state_lock); mutex_lock(&priv->state_lock);
@ -583,8 +579,8 @@ static int mlx5e_set_channels(struct net_device *dev,
if (arfs_enabled) if (arfs_enabled)
mlx5e_arfs_disable(priv); mlx5e_arfs_disable(priv);
priv->params.num_channels = count; priv->channels.params.num_channels = count;
mlx5e_build_default_indir_rqt(priv->mdev, priv->params.indirection_rqt, mlx5e_build_default_indir_rqt(priv->mdev, priv->channels.params.indirection_rqt,
MLX5E_INDIR_RQT_SIZE, count); MLX5E_INDIR_RQT_SIZE, count);
if (was_opened) if (was_opened)
@ -613,11 +609,11 @@ static int mlx5e_get_coalesce(struct net_device *netdev,
if (!MLX5_CAP_GEN(priv->mdev, cq_moderation)) if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
return -EOPNOTSUPP; return -EOPNOTSUPP;
coal->rx_coalesce_usecs = priv->params.rx_cq_moderation.usec; coal->rx_coalesce_usecs = priv->channels.params.rx_cq_moderation.usec;
coal->rx_max_coalesced_frames = priv->params.rx_cq_moderation.pkts; coal->rx_max_coalesced_frames = priv->channels.params.rx_cq_moderation.pkts;
coal->tx_coalesce_usecs = priv->params.tx_cq_moderation.usec; coal->tx_coalesce_usecs = priv->channels.params.tx_cq_moderation.usec;
coal->tx_max_coalesced_frames = priv->params.tx_cq_moderation.pkts; coal->tx_max_coalesced_frames = priv->channels.params.tx_cq_moderation.pkts;
coal->use_adaptive_rx_coalesce = priv->params.rx_am_enabled; coal->use_adaptive_rx_coalesce = priv->channels.params.rx_am_enabled;
return 0; return 0;
} }
@ -628,7 +624,7 @@ static int mlx5e_set_coalesce(struct net_device *netdev,
struct mlx5e_priv *priv = netdev_priv(netdev); struct mlx5e_priv *priv = netdev_priv(netdev);
struct mlx5_core_dev *mdev = priv->mdev; struct mlx5_core_dev *mdev = priv->mdev;
bool restart = bool restart =
!!coal->use_adaptive_rx_coalesce != priv->params.rx_am_enabled; !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_am_enabled;
bool was_opened; bool was_opened;
int err = 0; int err = 0;
int tc; int tc;
@ -642,13 +638,13 @@ static int mlx5e_set_coalesce(struct net_device *netdev,
was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state); was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
if (was_opened && restart) { if (was_opened && restart) {
mlx5e_close_locked(netdev); mlx5e_close_locked(netdev);
priv->params.rx_am_enabled = !!coal->use_adaptive_rx_coalesce; priv->channels.params.rx_am_enabled = !!coal->use_adaptive_rx_coalesce;
} }
priv->params.tx_cq_moderation.usec = coal->tx_coalesce_usecs; priv->channels.params.tx_cq_moderation.usec = coal->tx_coalesce_usecs;
priv->params.tx_cq_moderation.pkts = coal->tx_max_coalesced_frames; priv->channels.params.tx_cq_moderation.pkts = coal->tx_max_coalesced_frames;
priv->params.rx_cq_moderation.usec = coal->rx_coalesce_usecs; priv->channels.params.rx_cq_moderation.usec = coal->rx_coalesce_usecs;
priv->params.rx_cq_moderation.pkts = coal->rx_max_coalesced_frames; priv->channels.params.rx_cq_moderation.pkts = coal->rx_max_coalesced_frames;
if (!was_opened || restart) if (!was_opened || restart)
goto out; goto out;
@ -965,7 +961,7 @@ static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
{ {
struct mlx5e_priv *priv = netdev_priv(netdev); struct mlx5e_priv *priv = netdev_priv(netdev);
return sizeof(priv->params.toeplitz_hash_key); return sizeof(priv->channels.params.toeplitz_hash_key);
} }
static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev) static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
@ -979,15 +975,15 @@ static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
struct mlx5e_priv *priv = netdev_priv(netdev); struct mlx5e_priv *priv = netdev_priv(netdev);
if (indir) if (indir)
memcpy(indir, priv->params.indirection_rqt, memcpy(indir, priv->channels.params.indirection_rqt,
sizeof(priv->params.indirection_rqt)); sizeof(priv->channels.params.indirection_rqt));
if (key) if (key)
memcpy(key, priv->params.toeplitz_hash_key, memcpy(key, priv->channels.params.toeplitz_hash_key,
sizeof(priv->params.toeplitz_hash_key)); sizeof(priv->channels.params.toeplitz_hash_key));
if (hfunc) if (hfunc)
*hfunc = priv->params.rss_hfunc; *hfunc = priv->channels.params.rss_hfunc;
return 0; return 0;
} }
@ -1003,7 +999,7 @@ static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
memset(tirc, 0, ctxlen); memset(tirc, 0, ctxlen);
mlx5e_build_indir_tir_ctx_hash(priv, tirc, tt); mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc);
mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen); mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen);
} }
} }
@ -1028,20 +1024,20 @@ static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
mutex_lock(&priv->state_lock); mutex_lock(&priv->state_lock);
if (hfunc != ETH_RSS_HASH_NO_CHANGE && if (hfunc != ETH_RSS_HASH_NO_CHANGE &&
hfunc != priv->params.rss_hfunc) { hfunc != priv->channels.params.rss_hfunc) {
priv->params.rss_hfunc = hfunc; priv->channels.params.rss_hfunc = hfunc;
hash_changed = true; hash_changed = true;
} }
if (indir) { if (indir) {
memcpy(priv->params.indirection_rqt, indir, memcpy(priv->channels.params.indirection_rqt, indir,
sizeof(priv->params.indirection_rqt)); sizeof(priv->channels.params.indirection_rqt));
if (test_bit(MLX5E_STATE_OPENED, &priv->state)) { if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
u32 rqtn = priv->indir_rqt.rqtn; u32 rqtn = priv->indir_rqt.rqtn;
struct mlx5e_redirect_rqt_param rrp = { struct mlx5e_redirect_rqt_param rrp = {
.is_rss = true, .is_rss = true,
.rss.hfunc = priv->params.rss_hfunc, .rss.hfunc = priv->channels.params.rss_hfunc,
.rss.channels = &priv->channels .rss.channels = &priv->channels
}; };
@ -1050,10 +1046,10 @@ static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
} }
if (key) { if (key) {
memcpy(priv->params.toeplitz_hash_key, key, memcpy(priv->channels.params.toeplitz_hash_key, key,
sizeof(priv->params.toeplitz_hash_key)); sizeof(priv->channels.params.toeplitz_hash_key));
hash_changed = hash_changed || hash_changed = hash_changed ||
priv->params.rss_hfunc == ETH_RSS_HASH_TOP; priv->channels.params.rss_hfunc == ETH_RSS_HASH_TOP;
} }
if (hash_changed) if (hash_changed)
@ -1074,7 +1070,7 @@ static int mlx5e_get_rxnfc(struct net_device *netdev,
switch (info->cmd) { switch (info->cmd) {
case ETHTOOL_GRXRINGS: case ETHTOOL_GRXRINGS:
info->data = priv->params.num_channels; info->data = priv->channels.params.num_channels;
break; break;
case ETHTOOL_GRXCLSRLCNT: case ETHTOOL_GRXCLSRLCNT:
info->rule_cnt = priv->fs.ethtool.tot_num_rules; info->rule_cnt = priv->fs.ethtool.tot_num_rules;
@ -1102,7 +1098,7 @@ static int mlx5e_get_tunable(struct net_device *dev,
switch (tuna->id) { switch (tuna->id) {
case ETHTOOL_TX_COPYBREAK: case ETHTOOL_TX_COPYBREAK:
*(u32 *)data = priv->params.tx_max_inline; *(u32 *)data = priv->channels.params.tx_max_inline;
break; break;
default: default:
err = -EINVAL; err = -EINVAL;
@ -1136,7 +1132,7 @@ static int mlx5e_set_tunable(struct net_device *dev,
if (was_opened) if (was_opened)
mlx5e_close_locked(dev); mlx5e_close_locked(dev);
priv->params.tx_max_inline = val; priv->channels.params.tx_max_inline = val;
if (was_opened) if (was_opened)
err = mlx5e_open_locked(dev); err = mlx5e_open_locked(dev);
@ -1455,7 +1451,7 @@ static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
rx_cq_period_mode = enable ? rx_cq_period_mode = enable ?
MLX5_CQ_PERIOD_MODE_START_FROM_CQE : MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
MLX5_CQ_PERIOD_MODE_START_FROM_EQE; MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
rx_mode_changed = rx_cq_period_mode != priv->params.rx_cq_period_mode; rx_mode_changed = rx_cq_period_mode != priv->channels.params.rx_cq_period_mode;
if (rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE && if (rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
!MLX5_CAP_GEN(mdev, cq_period_start_from_cqe)) !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
@ -1468,7 +1464,7 @@ static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
if (reset) if (reset)
mlx5e_close_locked(netdev); mlx5e_close_locked(netdev);
mlx5e_set_rx_cq_mode_params(&priv->params, rx_cq_period_mode); mlx5e_set_rx_cq_mode_params(&priv->channels.params, rx_cq_period_mode);
if (reset) if (reset)
err = mlx5e_open_locked(netdev); err = mlx5e_open_locked(netdev);
@ -1491,8 +1487,9 @@ static int set_pflag_rx_cqe_compress(struct net_device *netdev,
} }
mlx5e_modify_rx_cqe_compression_locked(priv, enable); mlx5e_modify_rx_cqe_compression_locked(priv, enable);
priv->params.rx_cqe_compress_def = enable; priv->channels.params.rx_cqe_compress_def = enable;
mlx5e_set_rq_type_params(priv, priv->params.rq_wq_type); mlx5e_set_rq_type_params(priv->mdev, &priv->channels.params,
priv->channels.params.rq_wq_type);
return 0; return 0;
} }
@ -1504,7 +1501,7 @@ static int mlx5e_handle_pflag(struct net_device *netdev,
{ {
struct mlx5e_priv *priv = netdev_priv(netdev); struct mlx5e_priv *priv = netdev_priv(netdev);
bool enable = !!(wanted_flags & flag); bool enable = !!(wanted_flags & flag);
u32 changes = wanted_flags ^ priv->params.pflags; u32 changes = wanted_flags ^ priv->channels.params.pflags;
int err; int err;
if (!(changes & flag)) if (!(changes & flag))
@ -1517,7 +1514,7 @@ static int mlx5e_handle_pflag(struct net_device *netdev,
return err; return err;
} }
MLX5E_SET_PFLAG(priv, flag, enable); MLX5E_SET_PFLAG(&priv->channels.params, flag, enable);
return 0; return 0;
} }
@ -1546,7 +1543,7 @@ static u32 mlx5e_get_priv_flags(struct net_device *netdev)
{ {
struct mlx5e_priv *priv = netdev_priv(netdev); struct mlx5e_priv *priv = netdev_priv(netdev);
return priv->params.pflags; return priv->channels.params.pflags;
} }
static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)

2
drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c
View File

@ -390,7 +390,7 @@ static int validate_flow(struct mlx5e_priv *priv,
if (fs->location >= MAX_NUM_OF_ETHTOOL_RULES) if (fs->location >= MAX_NUM_OF_ETHTOOL_RULES)
return -EINVAL; return -EINVAL;
if (fs->ring_cookie >= priv->params.num_channels && if (fs->ring_cookie >= priv->channels.params.num_channels &&
fs->ring_cookie != RX_CLS_FLOW_DISC) fs->ring_cookie != RX_CLS_FLOW_DISC)
return -EINVAL; return -EINVAL;

436
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
View File

File diff suppressed because it is too large Load Diff

61
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
View File

@ -110,7 +110,7 @@ static void mlx5e_rep_update_sw_counters(struct mlx5e_priv *priv)
s->rx_packets += rq_stats->packets; s->rx_packets += rq_stats->packets;
s->rx_bytes += rq_stats->bytes; s->rx_bytes += rq_stats->bytes;
for (j = 0; j < priv->params.num_tc; j++) { for (j = 0; j < priv->channels.params.num_tc; j++) {
sq_stats = &c->sq[j].stats; sq_stats = &c->sq[j].stats;
s->tx_packets += sq_stats->packets; s->tx_packets += sq_stats->packets;
@ -192,7 +192,7 @@ int mlx5e_add_sqs_fwd_rules(struct mlx5e_priv *priv)
int n, tc, err, num_sqs = 0; int n, tc, err, num_sqs = 0;
u16 *sqs; u16 *sqs;
sqs = kcalloc(priv->channels.num * priv->params.num_tc, sizeof(u16), GFP_KERNEL); sqs = kcalloc(priv->channels.num * priv->channels.params.num_tc, sizeof(u16), GFP_KERNEL);
if (!sqs) if (!sqs)
return -ENOMEM; return -ENOMEM;
@ -399,42 +399,23 @@ static const struct net_device_ops mlx5e_netdev_ops_rep = {
.ndo_get_offload_stats = mlx5e_get_offload_stats, .ndo_get_offload_stats = mlx5e_get_offload_stats,
}; };
static void mlx5e_build_rep_netdev_priv(struct mlx5_core_dev *mdev, static void mlx5e_build_rep_params(struct mlx5_core_dev *mdev,
struct net_device *netdev, struct mlx5e_params *params)
const struct mlx5e_profile *profile,
void *ppriv)
{ {
struct mlx5e_priv *priv = netdev_priv(netdev);
u8 cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ? u8 cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ?
MLX5_CQ_PERIOD_MODE_START_FROM_CQE : MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
MLX5_CQ_PERIOD_MODE_START_FROM_EQE; MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
priv->params.log_sq_size = params->log_sq_size = MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE;
MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE; params->rq_wq_type = MLX5_WQ_TYPE_LINKED_LIST;
priv->params.rq_wq_type = MLX5_WQ_TYPE_LINKED_LIST; params->log_rq_size = MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE;
priv->params.log_rq_size = MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE;
priv->params.min_rx_wqes = mlx5_min_rx_wqes(priv->params.rq_wq_type, params->rx_am_enabled = MLX5_CAP_GEN(mdev, cq_moderation);
BIT(priv->params.log_rq_size)); mlx5e_set_rx_cq_mode_params(params, cq_period_mode);
priv->params.rx_am_enabled = MLX5_CAP_GEN(mdev, cq_moderation); params->tx_max_inline = mlx5e_get_max_inline_cap(mdev);
mlx5e_set_rx_cq_mode_params(&priv->params, cq_period_mode); params->num_tc = 1;
params->lro_wqe_sz = MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ;
priv->params.tx_max_inline = mlx5e_get_max_inline_cap(mdev);
priv->params.num_tc = 1;
priv->params.lro_wqe_sz =
MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ;
priv->mdev = mdev;
priv->netdev = netdev;
priv->params.num_channels = profile->max_nch(mdev);
priv->profile = profile;
priv->ppriv = ppriv;
mutex_init(&priv->state_lock);
INIT_DELAYED_WORK(&priv->update_stats_work, mlx5e_update_stats_work);
} }
static void mlx5e_build_rep_netdev(struct net_device *netdev) static void mlx5e_build_rep_netdev(struct net_device *netdev)
@ -460,7 +441,19 @@ static void mlx5e_init_rep(struct mlx5_core_dev *mdev,
const struct mlx5e_profile *profile, const struct mlx5e_profile *profile,
void *ppriv) void *ppriv)
{ {
mlx5e_build_rep_netdev_priv(mdev, netdev, profile, ppriv); struct mlx5e_priv *priv = netdev_priv(netdev);
priv->mdev = mdev;
priv->netdev = netdev;
priv->profile = profile;
priv->ppriv = ppriv;
mutex_init(&priv->state_lock);
INIT_DELAYED_WORK(&priv->update_stats_work, mlx5e_update_stats_work);
priv->channels.params.num_channels = profile->max_nch(mdev);
mlx5e_build_rep_params(mdev, &priv->channels.params);
mlx5e_build_rep_netdev(netdev); mlx5e_build_rep_netdev(netdev);
} }
@ -505,7 +498,7 @@ err_del_flow_rule:
err_destroy_direct_tirs: err_destroy_direct_tirs:
mlx5e_destroy_direct_tirs(priv); mlx5e_destroy_direct_tirs(priv);
err_destroy_direct_rqts: err_destroy_direct_rqts:
for (i = 0; i < priv->params.num_channels; i++) for (i = 0; i < priv->channels.params.num_channels; i++)
mlx5e_destroy_rqt(priv, &priv->direct_tir[i].rqt); mlx5e_destroy_rqt(priv, &priv->direct_tir[i].rqt);
return err; return err;
} }
@ -518,7 +511,7 @@ static void mlx5e_cleanup_rep_rx(struct mlx5e_priv *priv)
mlx5e_tc_cleanup(priv); mlx5e_tc_cleanup(priv);
mlx5_del_flow_rules(rep->vport_rx_rule); mlx5_del_flow_rules(rep->vport_rx_rule);
mlx5e_destroy_direct_tirs(priv); mlx5e_destroy_direct_tirs(priv);
for (i = 0; i < priv->params.num_channels; i++) for (i = 0; i < priv->channels.params.num_channels; i++)
mlx5e_destroy_rqt(priv, &priv->direct_tir[i].rqt); mlx5e_destroy_rqt(priv, &priv->direct_tir[i].rqt);
} }

8
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
View File

@ -163,19 +163,19 @@ void mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool val)
if (!MLX5_CAP_GEN(priv->mdev, cqe_compression)) if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
return; return;
if (MLX5E_GET_PFLAG(priv, MLX5E_PFLAG_RX_CQE_COMPRESS) == val) if (MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS) == val)
return; return;
was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state); was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
if (was_opened) if (was_opened)
mlx5e_close_locked(priv->netdev); mlx5e_close_locked(priv->netdev);
MLX5E_SET_PFLAG(priv, MLX5E_PFLAG_RX_CQE_COMPRESS, val); MLX5E_SET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS, val);
mlx5e_set_rq_type_params(priv, priv->params.rq_wq_type); mlx5e_set_rq_type_params(priv->mdev, &priv->channels.params,
priv->channels.params.rq_wq_type);
if (was_opened) if (was_opened)
mlx5e_open_locked(priv->netdev); mlx5e_open_locked(priv->netdev);
} }
#define RQ_PAGE_SIZE(rq) ((1 << rq->buff.page_order) << PAGE_SHIFT) #define RQ_PAGE_SIZE(rq) ((1 << rq->buff.page_order) << PAGE_SHIFT)

7
drivers/net/ethernet/mellanox/mlx5/core/en_tx.c
View File

@ -88,6 +88,7 @@ u16 mlx5e_select_queue(struct net_device *dev, struct sk_buff *skb,
{ {
struct mlx5e_priv *priv = netdev_priv(dev); struct mlx5e_priv *priv = netdev_priv(dev);
int channel_ix = fallback(dev, skb); int channel_ix = fallback(dev, skb);
u16 num_channels;
int up = 0; int up = 0;
if (!netdev_get_num_tc(dev)) if (!netdev_get_num_tc(dev))
@ -99,9 +100,9 @@ u16 mlx5e_select_queue(struct net_device *dev, struct sk_buff *skb,
/* channel_ix can be larger than num_channels since /* channel_ix can be larger than num_channels since
* dev->num_real_tx_queues = num_channels * num_tc * dev->num_real_tx_queues = num_channels * num_tc
*/ */
if (channel_ix >= priv->params.num_channels) num_channels = priv->channels.params.num_channels;
channel_ix = reciprocal_scale(channel_ix, if (channel_ix >= num_channels)
priv->params.num_channels); channel_ix = reciprocal_scale(channel_ix, num_channels);
return priv->channel_tc2txq[channel_ix][up]; return priv->channel_tc2txq[channel_ix][up];
} }