media: v4l: omap_vout: vrfb: Convert to dmaengine
The dmaengine driver for sDMA now have support for interleaved transfer. This trasnfer type was open coded with the legacy omap-dma API, but now we can move it to dmaengine. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
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@ -16,7 +16,6 @@
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#include <media/videobuf-dma-contig.h>
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#include <media/videobuf-dma-contig.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-device.h>
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#include <linux/omap-dma.h>
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#include <video/omapvrfb.h>
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#include <video/omapvrfb.h>
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#include "omap_voutdef.h"
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#include "omap_voutdef.h"
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@ -63,7 +62,7 @@ static int omap_vout_allocate_vrfb_buffers(struct omap_vout_device *vout,
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/*
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/*
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* Wakes up the application once the DMA transfer to VRFB space is completed.
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* Wakes up the application once the DMA transfer to VRFB space is completed.
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*/
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*/
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static void omap_vout_vrfb_dma_tx_callback(int lch, u16 ch_status, void *data)
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static void omap_vout_vrfb_dma_tx_callback(void *data)
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{
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{
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struct vid_vrfb_dma *t = (struct vid_vrfb_dma *) data;
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struct vid_vrfb_dma *t = (struct vid_vrfb_dma *) data;
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@ -94,6 +93,7 @@ int omap_vout_setup_vrfb_bufs(struct platform_device *pdev, int vid_num,
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int ret = 0, i, j;
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int ret = 0, i, j;
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struct omap_vout_device *vout;
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struct omap_vout_device *vout;
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struct video_device *vfd;
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struct video_device *vfd;
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dma_cap_mask_t mask;
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int image_width, image_height;
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int image_width, image_height;
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int vrfb_num_bufs = VRFB_NUM_BUFS;
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int vrfb_num_bufs = VRFB_NUM_BUFS;
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struct v4l2_device *v4l2_dev = platform_get_drvdata(pdev);
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struct v4l2_device *v4l2_dev = platform_get_drvdata(pdev);
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@ -131,18 +131,27 @@ int omap_vout_setup_vrfb_bufs(struct platform_device *pdev, int vid_num,
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/*
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/*
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* Request and Initialize DMA, for DMA based VRFB transfer
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* Request and Initialize DMA, for DMA based VRFB transfer
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*/
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*/
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vout->vrfb_dma_tx.dev_id = OMAP_DMA_NO_DEVICE;
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dma_cap_zero(mask);
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vout->vrfb_dma_tx.dma_ch = -1;
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dma_cap_set(DMA_INTERLEAVE, mask);
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vout->vrfb_dma_tx.req_status = DMA_CHAN_ALLOTED;
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vout->vrfb_dma_tx.chan = dma_request_chan_by_mask(&mask);
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ret = omap_request_dma(vout->vrfb_dma_tx.dev_id, "VRFB DMA TX",
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if (IS_ERR(vout->vrfb_dma_tx.chan)) {
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omap_vout_vrfb_dma_tx_callback,
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(void *) &vout->vrfb_dma_tx, &vout->vrfb_dma_tx.dma_ch);
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if (ret < 0) {
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vout->vrfb_dma_tx.req_status = DMA_CHAN_NOT_ALLOTED;
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vout->vrfb_dma_tx.req_status = DMA_CHAN_NOT_ALLOTED;
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} else {
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size_t xt_size = sizeof(struct dma_interleaved_template) +
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sizeof(struct data_chunk);
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vout->vrfb_dma_tx.xt = kzalloc(xt_size, GFP_KERNEL);
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if (!vout->vrfb_dma_tx.xt) {
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dma_release_channel(vout->vrfb_dma_tx.chan);
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vout->vrfb_dma_tx.req_status = DMA_CHAN_NOT_ALLOTED;
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}
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}
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if (vout->vrfb_dma_tx.req_status == DMA_CHAN_NOT_ALLOTED)
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dev_info(&pdev->dev,
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dev_info(&pdev->dev,
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": failed to allocate DMA Channel for video%d\n",
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": failed to allocate DMA Channel for video%d\n",
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vfd->minor);
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vfd->minor);
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}
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init_waitqueue_head(&vout->vrfb_dma_tx.wait);
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init_waitqueue_head(&vout->vrfb_dma_tx.wait);
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/* statically allocated the VRFB buffer is done through
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/* statically allocated the VRFB buffer is done through
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@ -177,7 +186,9 @@ void omap_vout_release_vrfb(struct omap_vout_device *vout)
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if (vout->vrfb_dma_tx.req_status == DMA_CHAN_ALLOTED) {
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if (vout->vrfb_dma_tx.req_status == DMA_CHAN_ALLOTED) {
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vout->vrfb_dma_tx.req_status = DMA_CHAN_NOT_ALLOTED;
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vout->vrfb_dma_tx.req_status = DMA_CHAN_NOT_ALLOTED;
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omap_free_dma(vout->vrfb_dma_tx.dma_ch);
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kfree(vout->vrfb_dma_tx.xt);
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dmaengine_terminate_sync(vout->vrfb_dma_tx.chan);
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dma_release_channel(vout->vrfb_dma_tx.chan);
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}
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}
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}
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}
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@ -219,70 +230,84 @@ int omap_vout_vrfb_buffer_setup(struct omap_vout_device *vout,
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}
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}
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int omap_vout_prepare_vrfb(struct omap_vout_device *vout,
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int omap_vout_prepare_vrfb(struct omap_vout_device *vout,
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struct videobuf_buffer *vb)
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struct videobuf_buffer *vb)
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{
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{
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dma_addr_t dmabuf;
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struct dma_async_tx_descriptor *tx;
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struct vid_vrfb_dma *tx;
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enum dma_ctrl_flags flags;
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struct dma_chan *chan = vout->vrfb_dma_tx.chan;
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struct dma_device *dmadev = chan->device;
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struct dma_interleaved_template *xt = vout->vrfb_dma_tx.xt;
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dma_cookie_t cookie;
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enum dma_status status;
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enum dss_rotation rotation;
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enum dss_rotation rotation;
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u32 dest_frame_index = 0, src_element_index = 0;
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size_t dst_icg;
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u32 dest_element_index = 0, src_frame_index = 0;
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u32 pixsize;
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u32 elem_count = 0, frame_count = 0, pixsize = 2;
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if (!is_rotation_enabled(vout))
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if (!is_rotation_enabled(vout))
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return 0;
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return 0;
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dmabuf = vout->buf_phy_addr[vb->i];
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/* If rotation is enabled, copy input buffer into VRFB
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/* If rotation is enabled, copy input buffer into VRFB
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* memory space using DMA. We are copying input buffer
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* memory space using DMA. We are copying input buffer
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* into VRFB memory space of desired angle and DSS will
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* into VRFB memory space of desired angle and DSS will
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* read image VRFB memory for 0 degree angle
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* read image VRFB memory for 0 degree angle
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*/
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*/
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pixsize = vout->bpp * vout->vrfb_bpp;
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pixsize = vout->bpp * vout->vrfb_bpp;
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/*
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dst_icg = ((MAX_PIXELS_PER_LINE * pixsize) -
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* DMA transfer in double index mode
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(vout->pix.width * vout->bpp)) + 1;
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*/
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/* Frame index */
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xt->src_start = vout->buf_phy_addr[vb->i];
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dest_frame_index = ((MAX_PIXELS_PER_LINE * pixsize) -
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xt->dst_start = vout->vrfb_context[vb->i].paddr[0];
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(vout->pix.width * vout->bpp)) + 1;
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/* Source and destination parameters */
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xt->numf = vout->pix.height;
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src_element_index = 0;
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xt->frame_size = 1;
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src_frame_index = 0;
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xt->sgl[0].size = vout->pix.width * vout->bpp;
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dest_element_index = 1;
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xt->sgl[0].icg = dst_icg;
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/* Number of elements per frame */
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elem_count = vout->pix.width * vout->bpp;
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frame_count = vout->pix.height;
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tx = &vout->vrfb_dma_tx;
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tx->tx_status = 0;
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omap_set_dma_transfer_params(tx->dma_ch, OMAP_DMA_DATA_TYPE_S32,
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(elem_count / 4), frame_count, OMAP_DMA_SYNC_ELEMENT,
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tx->dev_id, 0x0);
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/* src_port required only for OMAP1 */
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omap_set_dma_src_params(tx->dma_ch, 0, OMAP_DMA_AMODE_POST_INC,
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dmabuf, src_element_index, src_frame_index);
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/*set dma source burst mode for VRFB */
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omap_set_dma_src_burst_mode(tx->dma_ch, OMAP_DMA_DATA_BURST_16);
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rotation = calc_rotation(vout);
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/* dest_port required only for OMAP1 */
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xt->dir = DMA_MEM_TO_MEM;
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omap_set_dma_dest_params(tx->dma_ch, 0, OMAP_DMA_AMODE_DOUBLE_IDX,
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xt->src_sgl = false;
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vout->vrfb_context[vb->i].paddr[0], dest_element_index,
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xt->src_inc = true;
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dest_frame_index);
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xt->dst_sgl = true;
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/*set dma dest burst mode for VRFB */
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xt->dst_inc = true;
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omap_set_dma_dest_burst_mode(tx->dma_ch, OMAP_DMA_DATA_BURST_16);
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omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE, 0x20, 0);
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omap_start_dma(tx->dma_ch);
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tx = dmadev->device_prep_interleaved_dma(chan, xt, flags);
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wait_event_interruptible_timeout(tx->wait, tx->tx_status == 1,
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if (tx == NULL) {
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VRFB_TX_TIMEOUT);
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pr_err("%s: DMA interleaved prep error\n", __func__);
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if (tx->tx_status == 0) {
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omap_stop_dma(tx->dma_ch);
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return -EINVAL;
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return -EINVAL;
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}
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}
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tx->callback = omap_vout_vrfb_dma_tx_callback;
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tx->callback_param = &vout->vrfb_dma_tx;
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cookie = dmaengine_submit(tx);
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if (dma_submit_error(cookie)) {
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pr_err("%s: dmaengine_submit failed (%d)\n", __func__, cookie);
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return -EINVAL;
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}
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vout->vrfb_dma_tx.tx_status = 0;
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dma_async_issue_pending(chan);
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wait_event_interruptible_timeout(vout->vrfb_dma_tx.wait,
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vout->vrfb_dma_tx.tx_status == 1,
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VRFB_TX_TIMEOUT);
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status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
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if (vout->vrfb_dma_tx.tx_status == 0) {
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pr_err("%s: Timeout while waiting for DMA\n", __func__);
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dmaengine_terminate_sync(chan);
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return -EINVAL;
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} else if (status != DMA_COMPLETE) {
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pr_err("%s: DMA completion %s status\n", __func__,
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status == DMA_ERROR ? "error" : "busy");
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dmaengine_terminate_sync(chan);
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return -EINVAL;
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}
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/* Store buffers physical address into an array. Addresses
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/* Store buffers physical address into an array. Addresses
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* from this array will be used to configure DSS */
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* from this array will be used to configure DSS */
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rotation = calc_rotation(vout);
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vout->queued_buf_addr[vb->i] = (u8 *)
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vout->queued_buf_addr[vb->i] = (u8 *)
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vout->vrfb_context[vb->i].paddr[rotation];
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vout->vrfb_context[vb->i].paddr[rotation];
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return 0;
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return 0;
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@ -14,6 +14,7 @@
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-ctrls.h>
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#include <video/omapfb_dss.h>
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#include <video/omapfb_dss.h>
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#include <video/omapvrfb.h>
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#include <video/omapvrfb.h>
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#include <linux/dmaengine.h>
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#define YUYV_BPP 2
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#define YUYV_BPP 2
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#define RGB565_BPP 2
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#define RGB565_BPP 2
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@ -81,8 +82,9 @@ enum vout_rotaion_type {
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* for VRFB hidden buffer
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* for VRFB hidden buffer
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*/
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*/
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struct vid_vrfb_dma {
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struct vid_vrfb_dma {
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int dev_id;
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struct dma_chan *chan;
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int dma_ch;
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struct dma_interleaved_template *xt;
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int req_status;
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int req_status;
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int tx_status;
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int tx_status;
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wait_queue_head_t wait;
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wait_queue_head_t wait;
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