media: atomisp: get rid of an iomem abstraction layer

The hive_isp_css_custom_host_hrt.h code, together
with atomisp_helper.h, provides an abstraction layer for
some functions inside atomisp_compat_css20.c and atomisp_cmd.c.

There's no good reason for that. In a matter of fact, after
removing the abstraction, the code looked a lot cleaner
and easier to understand.

So, get rid of them.

While here, get rid also of the udelay(1) abstraction code.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
Mauro Carvalho Chehab 2020-06-01 10:50:35 +02:00
parent 662fb4fceb
commit 69a03e36c7
18 changed files with 44 additions and 192 deletions

View File

@ -665,6 +665,7 @@ bool atomisp_buffers_queued_pipe(struct atomisp_video_pipe *pipe)
void dump_sp_dmem(struct atomisp_device *isp, unsigned int addr,
unsigned int size)
{
u32 __iomem *io_virt_addr;
unsigned int data = 0;
unsigned int size32 = DIV_ROUND_UP(size, sizeof(u32));
@ -677,11 +678,11 @@ void dump_sp_dmem(struct atomisp_device *isp, unsigned int addr,
return;
}
addr += SP_DMEM_BASE;
io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
do {
data = _hrt_master_port_uload_32(addr);
data = *io_virt_addr;
dev_dbg(isp->dev, "%s, \t [0x%x]:0x%x\n", __func__, addr, data);
addr += sizeof(unsigned int);
io_virt_addr += sizeof(u32);
size32 -= 1;
} while (size32 > 0);
}

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@ -65,16 +65,6 @@ bool atomisp_buffers_queued(struct atomisp_sub_device *asd);
/* ISP2401 */
bool atomisp_buffers_queued_pipe(struct atomisp_video_pipe *pipe);
/* TODO:should be here instead of atomisp_helper.h
extern void __iomem *atomisp_io_base;
static inline void __iomem *atomisp_get_io_virt_addr(unsigned int address)
{
void __iomem *ret = atomisp_io_base + (address & 0x003FFFFF);
return ret;
}
*/
/*
* Interrupt functions
*/

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@ -29,6 +29,8 @@ struct atomisp_sub_device;
struct video_device;
enum atomisp_input_stream_id;
extern void __iomem *atomisp_io_base;
struct atomisp_metadata_buf {
struct ia_css_metadata *metadata;
void *md_vptr;

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@ -69,60 +69,66 @@ struct bayer_ds_factor {
static void atomisp_css2_hw_store_8(hrt_address addr, uint8_t data)
{
s8 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
unsigned long flags;
spin_lock_irqsave(&mmio_lock, flags);
_hrt_master_port_store_8(addr, data);
*io_virt_addr = data;
spin_unlock_irqrestore(&mmio_lock, flags);
}
static void atomisp_css2_hw_store_16(hrt_address addr, uint16_t data)
{
s16 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
unsigned long flags;
spin_lock_irqsave(&mmio_lock, flags);
_hrt_master_port_store_16(addr, data);
*io_virt_addr = data;
spin_unlock_irqrestore(&mmio_lock, flags);
}
void atomisp_css2_hw_store_32(hrt_address addr, uint32_t data)
{
s32 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
unsigned long flags;
spin_lock_irqsave(&mmio_lock, flags);
_hrt_master_port_store_32(addr, data);
*io_virt_addr = data;
spin_unlock_irqrestore(&mmio_lock, flags);
}
static uint8_t atomisp_css2_hw_load_8(hrt_address addr)
{
s8 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
unsigned long flags;
u8 ret;
spin_lock_irqsave(&mmio_lock, flags);
ret = _hrt_master_port_load_8(addr);
ret = *io_virt_addr;
spin_unlock_irqrestore(&mmio_lock, flags);
return ret;
}
static uint16_t atomisp_css2_hw_load_16(hrt_address addr)
{
s16 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
unsigned long flags;
u16 ret;
spin_lock_irqsave(&mmio_lock, flags);
ret = _hrt_master_port_load_16(addr);
ret = *io_virt_addr;
spin_unlock_irqrestore(&mmio_lock, flags);
return ret;
}
static uint32_t atomisp_css2_hw_load_32(hrt_address addr)
{
s32 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
unsigned long flags;
u32 ret;
spin_lock_irqsave(&mmio_lock, flags);
ret = _hrt_master_port_load_32(addr);
ret = *io_virt_addr;
spin_unlock_irqrestore(&mmio_lock, flags);
return ret;
}
@ -130,27 +136,25 @@ static uint32_t atomisp_css2_hw_load_32(hrt_address addr)
static void atomisp_css2_hw_store(hrt_address addr,
const void *from, uint32_t n)
{
s8 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
unsigned long flags;
unsigned int i;
unsigned int _to = (unsigned int)addr;
const char *_from = (const char *)from;
spin_lock_irqsave(&mmio_lock, flags);
for (i = 0; i < n; i++, _to++, _from++)
_hrt_master_port_store_8(_to, *_from);
for (i = 0; i < n; i++, io_virt_addr++, from++)
*io_virt_addr = *(s8 *)from;
spin_unlock_irqrestore(&mmio_lock, flags);
}
static void atomisp_css2_hw_load(hrt_address addr, void *to, uint32_t n)
{
s8 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
unsigned long flags;
unsigned int i;
char *_to = (char *)to;
unsigned int _from = (unsigned int)addr;
spin_lock_irqsave(&mmio_lock, flags);
for (i = 0; i < n; i++, _to++, _from++)
*_to = _hrt_master_port_load_8(_from);
for (i = 0; i < n; i++, to++, io_virt_addr++)
*(s8 *)to = *io_virt_addr;
spin_unlock_irqrestore(&mmio_lock, flags);
}
@ -992,9 +996,9 @@ void atomisp_css_rx_clear_irq_info(enum mipi_port_id port,
int atomisp_css_irq_enable(struct atomisp_device *isp,
enum ia_css_irq_info info, bool enable)
{
dev_dbg(isp->dev, "%s: css irq info 0x%08x: %s.\n",
dev_dbg(isp->dev, "%s: css irq info 0x%08x: %s (%d).\n",
__func__, info,
enable ? "enable" : "disable");
enable ? "enable" : "disable", enable);
if (ia_css_irq_enable(info, enable)) {
dev_warn(isp->dev, "%s:Invalid irq info: 0x%08x when %s.\n",
__func__, info,
@ -4292,8 +4296,13 @@ bool atomisp_css_valid_sof(struct atomisp_device *isp)
struct atomisp_sub_device *asd = &isp->asd[i];
/* Loop for each css vc stream */
for (j = 0; j < ATOMISP_INPUT_STREAM_NUM; j++) {
if (asd->stream_env[j].stream &&
asd->stream_env[j].stream_config.mode ==
if (!asd->stream_env[j].stream)
continue;
dev_dbg(isp->dev,
"stream #%d: mode: %d\n", j,
asd->stream_env[j].stream_config.mode);
if (asd->stream_env[j].stream_config.mode ==
IA_CSS_INPUT_MODE_BUFFERED_SENSOR)
return false;
}

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@ -1,29 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Support for Medifield PNW Camera Imaging ISP subsystem.
*
* Copyright (c) 2010 Intel Corporation. All Rights Reserved.
*
* Copyright (c) 2010 Silicon Hive www.siliconhive.com.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version
* 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
*/
#ifndef _atomisp_helper_h_
#define _atomisp_helper_h_
extern void __iomem *atomisp_io_base;
static inline void __iomem *atomisp_get_io_virt_addr(unsigned int address)
{
void __iomem *ret = atomisp_io_base + (address & 0x003FFFFF);
return ret;
}
#endif

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@ -21,8 +21,6 @@
#endif
#include "gp_device.h" /* _REG_GP_IRQ_REQUEST_ADDR */
#include "platform_support.h" /* hrt_sleep() */
static inline void irq_wait_for_write_complete(
const irq_ID_t ID);

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@ -13,6 +13,8 @@
* more details.
*/
#include <linux/delay.h>
#include <system_global.h>
#include "isp.h"
@ -21,7 +23,6 @@
#endif /* __INLINE_ISP__ */
#include "assert_support.h"
#include "platform_support.h" /* hrt_sleep() */
void cnd_isp_irq_enable(
const isp_ID_t ID,
@ -125,5 +126,5 @@ void isp_wake(isp_ID_t ID)
{
assert(ID < N_ISP_ID);
isp_ctrl_setbit(ID, ISP_SC_REG, ISP_START_BIT);
hrt_sleep();
udelay(1);
}

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@ -21,7 +21,6 @@
#include "ia_css_device_access.h"
#endif
#include "assert_support.h"
#include "platform_support.h" /* hrt_sleep() */
typedef unsigned long long hive_uedge;
typedef hive_uedge *hive_wide;
@ -155,7 +154,7 @@ static void load_vector(
hive_sim_wide_unpack(data, &elem, ISP_VEC_ELEMBITS, i);
to[i] = elem;
}
hrt_sleep(); /* Spend at least 1 cycles per vector */
udelay(1); /* Spend at least 1 cycles per vector */
}
static void store_vector(
@ -180,7 +179,7 @@ static void store_vector(
//hrt_mem_store (ISP, VMEM, (unsigned)to, &v, siz); /* This will overwrite the next vector as well */
hrt_master_port_store(ISP_BAMEM_BASE[ID] + (unsigned long)to, &v, size);
#endif
hrt_sleep(); /* Spend at least 1 cycles per vector */
udelay(1); /* Spend at least 1 cycles per vector */
}
void isp_vmem_load(

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@ -25,9 +25,6 @@
#include <linux/kernel.h>
#include <linux/string.h>
/* For definition of hrt_sleep() */
#include "hive_isp_css_custom_host_hrt.h"
#define UINT16_MAX USHRT_MAX
#define UINT32_MAX UINT_MAX
#define UCHAR_MAX (255)

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@ -1,107 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Support for Medifield PNW Camera Imaging ISP subsystem.
*
* Copyright (c) 2010 Intel Corporation. All Rights Reserved.
*
* Copyright (c) 2010 Silicon Hive www.siliconhive.com.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version
* 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
*/
#ifndef _hive_isp_css_custom_host_hrt_h_
#define _hive_isp_css_custom_host_hrt_h_
#include <linux/delay.h>
#include "atomisp_helper.h"
/*
* _hrt_master_port_store/load/uload -macros using __force attributed
* cast to intentional dereferencing __iomem attributed (noderef)
* pointer from atomisp_get_io_virt_addr
*/
#define _hrt_master_port_store_8(a, d) \
(*((s8 __force *)atomisp_get_io_virt_addr(a)) = (d))
#define _hrt_master_port_store_16(a, d) \
(*((s16 __force *)atomisp_get_io_virt_addr(a)) = (d))
#define _hrt_master_port_store_32(a, d) \
(*((s32 __force *)atomisp_get_io_virt_addr(a)) = (d))
#define _hrt_master_port_load_8(a) \
(*(s8 __force *)atomisp_get_io_virt_addr(a))
#define _hrt_master_port_load_16(a) \
(*(s16 __force *)atomisp_get_io_virt_addr(a))
#define _hrt_master_port_load_32(a) \
(*(s32 __force *)atomisp_get_io_virt_addr(a))
#define _hrt_master_port_uload_8(a) \
(*(u8 __force *)atomisp_get_io_virt_addr(a))
#define _hrt_master_port_uload_16(a) \
(*(u16 __force *)atomisp_get_io_virt_addr(a))
#define _hrt_master_port_uload_32(a) \
(*(u32 __force *)atomisp_get_io_virt_addr(a))
#define _hrt_master_port_store_8_volatile(a, d) _hrt_master_port_store_8(a, d)
#define _hrt_master_port_store_16_volatile(a, d) _hrt_master_port_store_16(a, d)
#define _hrt_master_port_store_32_volatile(a, d) _hrt_master_port_store_32(a, d)
#define _hrt_master_port_load_8_volatile(a) _hrt_master_port_load_8(a)
#define _hrt_master_port_load_16_volatile(a) _hrt_master_port_load_16(a)
#define _hrt_master_port_load_32_volatile(a) _hrt_master_port_load_32(a)
#define _hrt_master_port_uload_8_volatile(a) _hrt_master_port_uload_8(a)
#define _hrt_master_port_uload_16_volatile(a) _hrt_master_port_uload_16(a)
#define _hrt_master_port_uload_32_volatile(a) _hrt_master_port_uload_32(a)
static inline void hrt_sleep(void)
{
udelay(1);
}
static inline u32 _hrt_mem_store(u32 to, const void *from, size_t n)
{
unsigned int i;
u32 _to = to;
const char *_from = (const char *)from;
for (i = 0; i < n; i++, _to++, _from++)
_hrt_master_port_store_8(_to, *_from);
return _to;
}
static inline void *_hrt_mem_load(u32 from, void *to, size_t n)
{
unsigned int i;
char *_to = (char *)to;
u32 _from = from;
for (i = 0; i < n; i++, _to++, _from++)
*_to = _hrt_master_port_load_8(_from);
return _to;
}
static inline u32 _hrt_mem_set(u32 to, int c, size_t n)
{
unsigned int i;
u32 _to = to;
for (i = 0; i < n; i++, _to++)
_hrt_master_port_store_8(_to, c);
return _to;
}
#endif /* _hive_isp_css_custom_host_hrt_h_ */

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@ -20,8 +20,6 @@
#ifndef HRT_USE_VIR_ADDRS
#define HRT_USE_VIR_ADDRS
#endif
/* This interface is deprecated */
/*#include "hive_isp_css_custom_host_hrt.h"*/
#endif
#include "system_global.h"

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@ -20,8 +20,6 @@
#ifndef HRT_USE_VIR_ADDRS
#define HRT_USE_VIR_ADDRS
#endif
/* This interface is deprecated */
/*#include "hive_isp_css_custom_host_hrt.h"*/
#endif
#include "system_global.h"

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@ -31,7 +31,6 @@
/*#include "sp.h"*/ /* host2sp_enqueue_frame_data() */
#include "assert_support.h"
#include "platform_support.h" /* hrt_sleep() */
#include "ia_css_queue.h" /* host_sp_enqueue_XXX */
#include "ia_css_event.h" /* ia_css_event_encode */

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@ -20,8 +20,6 @@
#include "ia_css_event.h" /* ia_css_event_encode()
ia_css_event_decode()
*/
#include "platform_support.h" /* hrt_sleep() */
int ia_css_eventq_recv(
ia_css_queue_t *eventq_handle,
uint8_t *payload)
@ -72,7 +70,7 @@ int ia_css_eventq_send(
break;
}
/* Wait for the queue to be not full and try again*/
hrt_sleep();
udelay(1);
}
return error;
}

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@ -104,7 +104,7 @@ static inline void
_sh_css_fifo_snd(unsigned int token)
{
while (!can_event_send_token(STR2MIPI_EVENT_ID))
hrt_sleep();
udelay(1);
event_send_token(STR2MIPI_EVENT_ID, token);
return;
}

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@ -76,7 +76,6 @@
#define __INLINE_GPIO__
#include "gpio.h"
#include "timed_ctrl.h"
#include "platform_support.h" /* hrt_sleep(), inline */
#include "ia_css_inputfifo.h"
#define WITH_PC_MONITORING 0
@ -10379,7 +10378,7 @@ ia_css_start_sp(void) {
while ((ia_css_spctrl_get_state(SP0_ID) != IA_CSS_SP_SW_INITIALIZED) && timeout)
{
timeout--;
hrt_sleep();
udelay(1);
}
if (timeout == 0)
{
@ -10443,7 +10442,7 @@ ia_css_stop_sp(void) {
while (!ia_css_spctrl_is_idle(SP0_ID) && timeout)
{
timeout--;
hrt_sleep();
udelay(1);
}
if ((ia_css_spctrl_get_state(SP0_ID) != IA_CSS_SP_SW_TERMINATED))
IA_CSS_WARNING("SP has not terminated (SW)");
@ -10457,7 +10456,7 @@ ia_css_stop_sp(void) {
while (!isp_ctrl_getbit(ISP0_ID, ISP_SC_REG, ISP_IDLE_BIT) && timeout)
{
timeout--;
hrt_sleep();
udelay(1);
}
if (timeout == 0)
{

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@ -79,7 +79,7 @@ int sh_css_hrt_sp_wait(void)
((irq_reg_load(IRQ0_ID,
_HRT_IRQ_CONTROLLER_STATUS_REG_IDX) &
(1U << (irq_id + IRQ_SW_CHANNEL_OFFSET))) == 0)) {
hrt_sleep();
udelay(1);
}
return 0;

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@ -48,7 +48,6 @@
#include "assert_support.h"
#include "platform_support.h" /* hrt_sleep() */
#include "sw_event_global.h" /* Event IDs.*/
#include "ia_css_event.h"