forked from Minki/linux
powerpc/mm: move pgtable_t in asm/mmu.h
pgtable_t is now identical for all subarches, move it to the top level asm/mmu.h Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -10,8 +10,6 @@
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* BATs
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*/
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#include <asm/page.h>
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/* Block size masks */
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#define BL_128K 0x000
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#define BL_256K 0x001
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@ -49,8 +47,6 @@ struct ppc_bat {
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u32 batu;
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u32 batl;
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};
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typedef pte_t *pgtable_t;
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#endif /* !__ASSEMBLY__ */
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/*
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@ -25,14 +25,6 @@ struct mmu_psize_def {
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};
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};
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extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
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/*
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* For BOOK3s 64 with 4k and 64K linux page size
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* we want to use pointers, because the page table
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* actually store pfn
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*/
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typedef pte_t *pgtable_t;
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#endif /* __ASSEMBLY__ */
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/*
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@ -129,6 +129,9 @@
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#ifndef __ASSEMBLY__
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#include <linux/bug.h>
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#include <asm/cputable.h>
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#include <asm/page.h>
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typedef pte_t *pgtable_t;
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#ifdef CONFIG_PPC_FSL_BOOK3E
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#include <asm/percpu.h>
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@ -2,8 +2,6 @@
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#ifndef _ASM_POWERPC_NOHASH_32_MMU_H_
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#define _ASM_POWERPC_NOHASH_32_MMU_H_
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#include <asm/page.h>
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#if defined(CONFIG_40x)
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/* 40x-style software loaded TLB */
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#include <asm/nohash/32/mmu-40x.h>
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@ -18,8 +16,4 @@
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#include <asm/nohash/32/mmu-8xx.h>
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#endif
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#ifndef __ASSEMBLY__
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typedef pte_t *pgtable_t;
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#endif
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#endif /* _ASM_POWERPC_NOHASH_32_MMU_H_ */
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@ -4,13 +4,7 @@
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#define MAX_PHYSMEM_BITS 44
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#include <asm/page.h>
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/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
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#include <asm/nohash/mmu-book3e.h>
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#ifndef __ASSEMBLY__
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typedef pte_t *pgtable_t;
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#endif
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#endif /* _ASM_POWERPC_NOHASH_64_MMU_H_ */
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