leandrof/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

powerpc/mm: move pgtable_t in asm/mmu.h

Browse Source 
pgtable_t is now identical for all subarches, move it to the
top level asm/mmu.h

Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Christophe Leroy 2019-04-26 15:58:02 +00:00 committed by Michael Ellerman
parent 737b434d3d
commit 696dffa24b
5 changed files with 3 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/powerpc/include/asm/book3s/32/mmu-hash.h
View File

@ -10,8 +10,6 @@
* BATs * BATs
*/ */
#include <asm/page.h>
/* Block size masks */ /* Block size masks */
#define BL_128K 0x000 #define BL_128K 0x000
#define BL_256K 0x001 #define BL_256K 0x001
@ -49,8 +47,6 @@ struct ppc_bat {
u32 batu; u32 batu;
u32 batl; u32 batl;
}; };
typedef pte_t *pgtable_t;
#endif /* !__ASSEMBLY__ */ #endif /* !__ASSEMBLY__ */
/* /*

8
arch/powerpc/include/asm/book3s/64/mmu.h
View File

@ -25,14 +25,6 @@ struct mmu_psize_def {
}; };
}; };
extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
/*
* For BOOK3s 64 with 4k and 64K linux page size
* we want to use pointers, because the page table
* actually store pfn
*/
typedef pte_t *pgtable_t;
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
/* /*

3
arch/powerpc/include/asm/mmu.h
View File

@ -129,6 +129,9 @@
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#include <linux/bug.h> #include <linux/bug.h>
#include <asm/cputable.h> #include <asm/cputable.h>
#include <asm/page.h>
typedef pte_t *pgtable_t;
#ifdef CONFIG_PPC_FSL_BOOK3E #ifdef CONFIG_PPC_FSL_BOOK3E
#include <asm/percpu.h> #include <asm/percpu.h>

6
arch/powerpc/include/asm/nohash/32/mmu.h
View File

@ -2,8 +2,6 @@
#ifndef _ASM_POWERPC_NOHASH_32_MMU_H_ #ifndef _ASM_POWERPC_NOHASH_32_MMU_H_
#define _ASM_POWERPC_NOHASH_32_MMU_H_ #define _ASM_POWERPC_NOHASH_32_MMU_H_
#include <asm/page.h>
#if defined(CONFIG_40x) #if defined(CONFIG_40x)
/* 40x-style software loaded TLB */ /* 40x-style software loaded TLB */
#include <asm/nohash/32/mmu-40x.h> #include <asm/nohash/32/mmu-40x.h>
@ -18,8 +16,4 @@
#include <asm/nohash/32/mmu-8xx.h> #include <asm/nohash/32/mmu-8xx.h>
#endif #endif
#ifndef __ASSEMBLY__
typedef pte_t *pgtable_t;
#endif
#endif /* _ASM_POWERPC_NOHASH_32_MMU_H_ */ #endif /* _ASM_POWERPC_NOHASH_32_MMU_H_ */

6
arch/powerpc/include/asm/nohash/64/mmu.h
View File

@ -4,13 +4,7 @@
#define MAX_PHYSMEM_BITS 44 #define MAX_PHYSMEM_BITS 44
#include <asm/page.h>
/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */ /* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
#include <asm/nohash/mmu-book3e.h> #include <asm/nohash/mmu-book3e.h>
#ifndef __ASSEMBLY__
typedef pte_t *pgtable_t;
#endif
#endif /* _ASM_POWERPC_NOHASH_64_MMU_H_ */ #endif /* _ASM_POWERPC_NOHASH_64_MMU_H_ */