usb: xhci: bInterval quirk for TI TUSB73x0
As per [1] issue #4, "The periodic EP scheduler always tries to schedule the EPs that have large intervals (interval equal to or greater than 128 microframes) into different microframes. So it maintains an internal counter and increments for each large interval EP added. When the counter is greater than 128, the scheduler rejects the new EP. So when the hub re-enumerated 128 times, it triggers this condition." This results in Bandwidth error when devices with periodic endpoints (ISO/INT) having bInterval > 7 are plugged and unplugged several times on a TUSB73x0 XHCI host. Workaround this issue by limiting the bInterval to 7 (i.e. interval to 6) for High-speed or faster periodic endpoints. [1] - http://www.ti.com/lit/er/sllz076/sllz076.pdf Cc: stable <stable@vger.kernel.org> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -1503,6 +1503,17 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
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*/
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max_esit_payload = xhci_get_max_esit_payload(udev, ep);
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interval = xhci_get_endpoint_interval(udev, ep);
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/* Periodic endpoint bInterval limit quirk */
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if (usb_endpoint_xfer_int(&ep->desc) ||
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usb_endpoint_xfer_isoc(&ep->desc)) {
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if ((xhci->quirks & XHCI_LIMIT_ENDPOINT_INTERVAL_7) &&
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udev->speed >= USB_SPEED_HIGH &&
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interval >= 7) {
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interval = 6;
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}
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}
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mult = xhci_get_endpoint_mult(udev, ep);
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max_packet = usb_endpoint_maxp(&ep->desc);
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max_burst = xhci_get_endpoint_max_burst(udev, ep);
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@ -199,6 +199,9 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
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pdev->device == 0x1042)
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xhci->quirks |= XHCI_BROKEN_STREAMS;
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if (pdev->vendor == PCI_VENDOR_ID_TI && pdev->device == 0x8241)
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xhci->quirks |= XHCI_LIMIT_ENDPOINT_INTERVAL_7;
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if (xhci->quirks & XHCI_RESET_ON_RESUME)
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xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
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"QUIRK: Resetting on resume");
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@ -1820,6 +1820,7 @@ struct xhci_hcd {
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#define XHCI_MISSING_CAS (1 << 24)
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/* For controller with a broken Port Disable implementation */
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#define XHCI_BROKEN_PORT_PED (1 << 25)
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#define XHCI_LIMIT_ENDPOINT_INTERVAL_7 (1 << 26)
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unsigned int num_active_eps;
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unsigned int limit_active_eps;
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