forked from Minki/linux
iwlwifi: dump periphery registers to fw-error-dump
Use the fw-error-dump infrastructure to dump the periphery registers. Only certain ranges are readable, so dump only these. Reviewed-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
This commit is contained in:
parent
48eb7b34ff
commit
67c65f2cf7
@ -77,6 +77,8 @@
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* @IWL_FW_ERROR_DUMP_DEV_FW_INFO: struct %iwl_fw_error_dump_info
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* info on the device / firmware.
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* @IWL_FW_ERROR_DUMP_FW_MONITOR: firmware monitor
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* @IWL_FW_ERROR_DUMP_PRPH: range of periphery registers - there can be several
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* sections like this in a single file.
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*/
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enum iwl_fw_error_dump_type {
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IWL_FW_ERROR_DUMP_SRAM = 0,
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@ -85,6 +87,7 @@ enum iwl_fw_error_dump_type {
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IWL_FW_ERROR_DUMP_TXCMD = 3,
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IWL_FW_ERROR_DUMP_DEV_FW_INFO = 4,
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IWL_FW_ERROR_DUMP_FW_MONITOR = 5,
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IWL_FW_ERROR_DUMP_PRPH = 6,
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IWL_FW_ERROR_DUMP_MAX,
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};
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@ -162,6 +165,16 @@ struct iwl_fw_error_dump_fw_mon {
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u8 data[];
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} __packed;
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/**
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* struct iwl_fw_error_dump_prph - periphery registers data
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* @prph_start: address of the first register in this chunk
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* @data: the content of the registers
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*/
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struct iwl_fw_error_dump_prph {
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__le32 prph_start;
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__le32 data[];
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};
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/**
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* iwl_fw_error_next_data - advance fw error dump data pointer
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* @data: previous data block
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@ -1774,6 +1774,144 @@ static u32 iwl_trans_pcie_get_cmdlen(struct iwl_tfd *tfd)
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return cmdlen;
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}
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static const struct {
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u32 start, end;
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} iwl_prph_dump_addr[] = {
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{ .start = 0x00a00000, .end = 0x00a00000 },
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{ .start = 0x00a0000c, .end = 0x00a00024 },
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{ .start = 0x00a0002c, .end = 0x00a0003c },
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{ .start = 0x00a00410, .end = 0x00a00418 },
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{ .start = 0x00a00420, .end = 0x00a00420 },
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{ .start = 0x00a00428, .end = 0x00a00428 },
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{ .start = 0x00a00430, .end = 0x00a0043c },
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{ .start = 0x00a00444, .end = 0x00a00444 },
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{ .start = 0x00a004c0, .end = 0x00a004cc },
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{ .start = 0x00a004d8, .end = 0x00a004d8 },
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{ .start = 0x00a004e0, .end = 0x00a004f0 },
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{ .start = 0x00a00840, .end = 0x00a00840 },
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{ .start = 0x00a00850, .end = 0x00a00858 },
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{ .start = 0x00a01004, .end = 0x00a01008 },
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{ .start = 0x00a01010, .end = 0x00a01010 },
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{ .start = 0x00a01018, .end = 0x00a01018 },
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{ .start = 0x00a01024, .end = 0x00a01024 },
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{ .start = 0x00a0102c, .end = 0x00a01034 },
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{ .start = 0x00a0103c, .end = 0x00a01040 },
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{ .start = 0x00a01048, .end = 0x00a01094 },
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{ .start = 0x00a01c00, .end = 0x00a01c20 },
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{ .start = 0x00a01c58, .end = 0x00a01c58 },
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{ .start = 0x00a01c7c, .end = 0x00a01c7c },
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{ .start = 0x00a01c28, .end = 0x00a01c54 },
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{ .start = 0x00a01c5c, .end = 0x00a01c5c },
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{ .start = 0x00a01c84, .end = 0x00a01c84 },
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{ .start = 0x00a01ce0, .end = 0x00a01d0c },
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{ .start = 0x00a01d18, .end = 0x00a01d20 },
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{ .start = 0x00a01d2c, .end = 0x00a01d30 },
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{ .start = 0x00a01d40, .end = 0x00a01d5c },
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{ .start = 0x00a01d80, .end = 0x00a01d80 },
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{ .start = 0x00a01d98, .end = 0x00a01d98 },
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{ .start = 0x00a01dc0, .end = 0x00a01dfc },
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{ .start = 0x00a01e00, .end = 0x00a01e2c },
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{ .start = 0x00a01e40, .end = 0x00a01e60 },
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{ .start = 0x00a01e84, .end = 0x00a01e90 },
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{ .start = 0x00a01e9c, .end = 0x00a01ec4 },
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{ .start = 0x00a01ed0, .end = 0x00a01ed0 },
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{ .start = 0x00a01f00, .end = 0x00a01f14 },
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{ .start = 0x00a01f44, .end = 0x00a01f58 },
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{ .start = 0x00a01f80, .end = 0x00a01fa8 },
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{ .start = 0x00a01fb0, .end = 0x00a01fbc },
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{ .start = 0x00a01ff8, .end = 0x00a01ffc },
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{ .start = 0x00a02000, .end = 0x00a02048 },
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{ .start = 0x00a02068, .end = 0x00a020f0 },
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{ .start = 0x00a02100, .end = 0x00a02118 },
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{ .start = 0x00a02140, .end = 0x00a0214c },
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{ .start = 0x00a02168, .end = 0x00a0218c },
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{ .start = 0x00a021c0, .end = 0x00a021c0 },
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{ .start = 0x00a02400, .end = 0x00a02410 },
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{ .start = 0x00a02418, .end = 0x00a02420 },
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{ .start = 0x00a02428, .end = 0x00a0242c },
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{ .start = 0x00a02434, .end = 0x00a02434 },
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{ .start = 0x00a02440, .end = 0x00a02460 },
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{ .start = 0x00a02468, .end = 0x00a024b0 },
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{ .start = 0x00a024c8, .end = 0x00a024cc },
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{ .start = 0x00a02500, .end = 0x00a02504 },
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{ .start = 0x00a0250c, .end = 0x00a02510 },
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{ .start = 0x00a02540, .end = 0x00a02554 },
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{ .start = 0x00a02580, .end = 0x00a025f4 },
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{ .start = 0x00a02600, .end = 0x00a0260c },
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{ .start = 0x00a02648, .end = 0x00a02650 },
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{ .start = 0x00a02680, .end = 0x00a02680 },
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{ .start = 0x00a026c0, .end = 0x00a026d0 },
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{ .start = 0x00a02700, .end = 0x00a0270c },
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{ .start = 0x00a02804, .end = 0x00a02804 },
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{ .start = 0x00a02818, .end = 0x00a0281c },
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{ .start = 0x00a02c00, .end = 0x00a02db4 },
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{ .start = 0x00a02df4, .end = 0x00a02fb0 },
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{ .start = 0x00a03000, .end = 0x00a03014 },
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{ .start = 0x00a0301c, .end = 0x00a0302c },
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{ .start = 0x00a03034, .end = 0x00a03038 },
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{ .start = 0x00a03040, .end = 0x00a03048 },
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{ .start = 0x00a03060, .end = 0x00a03068 },
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{ .start = 0x00a03070, .end = 0x00a03074 },
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{ .start = 0x00a0307c, .end = 0x00a0307c },
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{ .start = 0x00a03080, .end = 0x00a03084 },
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{ .start = 0x00a0308c, .end = 0x00a03090 },
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{ .start = 0x00a03098, .end = 0x00a03098 },
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{ .start = 0x00a030a0, .end = 0x00a030a0 },
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{ .start = 0x00a030a8, .end = 0x00a030b4 },
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{ .start = 0x00a030bc, .end = 0x00a030bc },
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{ .start = 0x00a030c0, .end = 0x00a0312c },
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{ .start = 0x00a03c00, .end = 0x00a03c5c },
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{ .start = 0x00a04400, .end = 0x00a04454 },
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{ .start = 0x00a04460, .end = 0x00a04474 },
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{ .start = 0x00a044c0, .end = 0x00a044ec },
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{ .start = 0x00a04500, .end = 0x00a04504 },
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{ .start = 0x00a04510, .end = 0x00a04538 },
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{ .start = 0x00a04540, .end = 0x00a04548 },
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{ .start = 0x00a04560, .end = 0x00a0457c },
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{ .start = 0x00a04590, .end = 0x00a04598 },
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{ .start = 0x00a045c0, .end = 0x00a045f4 },
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};
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static u32 iwl_trans_pcie_dump_prph(struct iwl_trans *trans,
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struct iwl_fw_error_dump_data **data)
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{
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struct iwl_fw_error_dump_prph *prph;
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unsigned long flags;
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u32 prph_len = 0, i;
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if (!iwl_trans_grab_nic_access(trans, false, &flags))
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return 0;
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for (i = 0; i < ARRAY_SIZE(iwl_prph_dump_addr); i++) {
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/* The range includes both boundaries */
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int num_bytes_in_chunk = iwl_prph_dump_addr[i].end -
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iwl_prph_dump_addr[i].start + 4;
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int reg;
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__le32 *val;
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prph_len += sizeof(*data) + sizeof(*prph) +
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num_bytes_in_chunk;
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(*data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_PRPH);
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(*data)->len = cpu_to_le32(sizeof(*prph) +
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num_bytes_in_chunk);
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prph = (void *)(*data)->data;
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prph->prph_start = cpu_to_le32(iwl_prph_dump_addr[i].start);
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val = (void *)prph->data;
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for (reg = iwl_prph_dump_addr[i].start;
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reg <= iwl_prph_dump_addr[i].end;
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reg += 4)
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*val++ = cpu_to_le32(iwl_trans_pcie_read_prph(trans,
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reg));
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*data = iwl_fw_error_next_data(*data);
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}
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iwl_trans_release_nic_access(trans, &flags);
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return prph_len;
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}
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static
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struct iwl_trans_dump_data *iwl_trans_pcie_dump_data(struct iwl_trans *trans)
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{
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@ -1788,6 +1926,15 @@ struct iwl_trans_dump_data *iwl_trans_pcie_dump_data(struct iwl_trans *trans)
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len = sizeof(*dump_data) + sizeof(*data) +
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cmdq->q.n_window * (sizeof(*txcmd) + TFD_MAX_PAYLOAD_SIZE);
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for (i = 0; i < ARRAY_SIZE(iwl_prph_dump_addr); i++) {
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/* The range includes both boundaries */
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int num_bytes_in_chunk = iwl_prph_dump_addr[i].end -
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iwl_prph_dump_addr[i].start + 4;
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len += sizeof(*data) + sizeof(struct iwl_fw_error_dump_prph) +
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num_bytes_in_chunk;
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}
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if (trans_pcie->fw_mon_page)
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len += sizeof(*data) + sizeof(struct iwl_fw_error_dump_fw_mon) +
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trans_pcie->fw_mon_size;
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@ -1823,11 +1970,14 @@ struct iwl_trans_dump_data *iwl_trans_pcie_dump_data(struct iwl_trans *trans)
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data->len = cpu_to_le32(len);
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len += sizeof(*data);
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data = iwl_fw_error_next_data(data);
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len += iwl_trans_pcie_dump_prph(trans, &data);
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/* data is already pointing to the next section */
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if (trans_pcie->fw_mon_page) {
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struct iwl_fw_error_dump_fw_mon *fw_mon_data;
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data = iwl_fw_error_next_data(data);
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data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_FW_MONITOR);
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data->len = cpu_to_le32(trans_pcie->fw_mon_size +
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sizeof(*fw_mon_data));
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