ARM: LPC32xx: ADC support for mach-lpc32xx
This patch adds the mach specific support for the LPC32XX ADC driver (the latter being already in staging/iio) Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Jonathan Cameron <jic23@kernel.org> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -719,6 +719,41 @@ static struct clk clk_tsc = {
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.get_rate = local_return_parent_rate,
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.get_rate = local_return_parent_rate,
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};
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};
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static int adc_onoff_enable(struct clk *clk, int enable)
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{
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u32 tmp;
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u32 divider;
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/* Use PERIPH_CLOCK */
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tmp = __raw_readl(LPC32XX_CLKPWR_ADC_CLK_CTRL_1);
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tmp |= LPC32XX_CLKPWR_ADCCTRL1_PCLK_SEL;
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/*
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* Set clock divider so that we have equal to or less than
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* 4.5MHz clock at ADC
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*/
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divider = clk->get_rate(clk) / 4500000 + 1;
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tmp |= divider;
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__raw_writel(tmp, LPC32XX_CLKPWR_ADC_CLK_CTRL_1);
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/* synchronize rate of this clock w/ actual HW setting */
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clk->rate = clk->get_rate(clk->parent) / divider;
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if (enable == 0)
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__raw_writel(0, clk->enable_reg);
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else
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__raw_writel(clk->enable_mask, clk->enable_reg);
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return 0;
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}
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static struct clk clk_adc = {
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.parent = &clk_pclk,
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.enable = adc_onoff_enable,
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.enable_reg = LPC32XX_CLKPWR_ADC_CLK_CTRL,
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.enable_mask = LPC32XX_CLKPWR_ADC32CLKCTRL_CLK_EN,
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.get_rate = local_return_parent_rate,
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};
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static int mmc_onoff_enable(struct clk *clk, int enable)
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static int mmc_onoff_enable(struct clk *clk, int enable)
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{
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{
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u32 tmp;
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u32 tmp;
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@ -1075,6 +1110,7 @@ static struct clk_lookup lookups[] = {
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_REGISTER_CLOCK("dev:ssp1", NULL, clk_ssp1)
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_REGISTER_CLOCK("dev:ssp1", NULL, clk_ssp1)
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_REGISTER_CLOCK("lpc32xx_keys.0", NULL, clk_kscan)
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_REGISTER_CLOCK("lpc32xx_keys.0", NULL, clk_kscan)
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_REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand)
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_REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand)
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_REGISTER_CLOCK("lpc32xx-adc", NULL, clk_adc)
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_REGISTER_CLOCK("tbd", "i2s0_ck", clk_i2s0)
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_REGISTER_CLOCK("tbd", "i2s0_ck", clk_i2s0)
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_REGISTER_CLOCK("tbd", "i2s1_ck", clk_i2s1)
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_REGISTER_CLOCK("tbd", "i2s1_ck", clk_i2s1)
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_REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc)
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_REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc)
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@ -137,6 +137,28 @@ struct platform_device lpc32xx_rtc_device = {
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.resource = lpc32xx_rtc_resources,
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.resource = lpc32xx_rtc_resources,
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};
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};
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/*
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* ADC support
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*/
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static struct resource adc_resources[] = {
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{
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.start = LPC32XX_ADC_BASE,
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.end = LPC32XX_ADC_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_LPC32XX_TS_IRQ,
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.end = IRQ_LPC32XX_TS_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device lpc32xx_adc_device = {
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.name = "lpc32xx-adc",
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.id = -1,
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.num_resources = ARRAY_SIZE(adc_resources),
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.resource = adc_resources,
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};
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/*
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/*
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* Returns the unique ID for the device
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* Returns the unique ID for the device
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*/
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*/
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@ -29,6 +29,7 @@ extern struct platform_device lpc32xx_i2c0_device;
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extern struct platform_device lpc32xx_i2c1_device;
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extern struct platform_device lpc32xx_i2c1_device;
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extern struct platform_device lpc32xx_i2c2_device;
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extern struct platform_device lpc32xx_i2c2_device;
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extern struct platform_device lpc32xx_tsc_device;
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extern struct platform_device lpc32xx_tsc_device;
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extern struct platform_device lpc32xx_adc_device;
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extern struct platform_device lpc32xx_rtc_device;
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extern struct platform_device lpc32xx_rtc_device;
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/*
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/*
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@ -276,6 +276,7 @@ static struct platform_device *phy3250_devs[] __initdata = {
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&lpc32xx_i2c2_device,
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&lpc32xx_i2c2_device,
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&lpc32xx_watchdog_device,
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&lpc32xx_watchdog_device,
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&lpc32xx_gpio_led_device,
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&lpc32xx_gpio_led_device,
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&lpc32xx_adc_device,
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};
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};
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static struct amba_device *amba_devs[] __initdata = {
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static struct amba_device *amba_devs[] __initdata = {
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