forked from Minki/linux
arm: kirkwood: add SoC-level Device Tree data for PCIe interfaces
This commit adds Device Tree details to enable the PCIe interfaces on Kirkwood. The 6281 has one PCIe interface, the 6282 has two PCIe interfaces. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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5afb9fe367
commit
670ee03ccc
arch/arm/boot/dts
@ -40,5 +40,36 @@
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marvell,function = "sdio";
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};
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};
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pcie-controller {
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compatible = "marvell,kirkwood-pcie";
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status = "disabled";
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x00 0xff>;
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ranges = <0x82000000 0 0x00040000 0x00040000 0 0x00002000 /* Port 0.0 registers */
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0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
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0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
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pcie@1,0 {
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device_type = "pci";
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assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
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reg = <0x0800 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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ranges;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &intc 9>;
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marvell,pcie-port = <0>;
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marvell,pcie-lane = <0>;
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clocks = <&gate_clk 2>;
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status = "disabled";
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};
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};
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};
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};
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@ -65,5 +65,53 @@
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clocks = <&gate_clk 7>;
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status = "disabled";
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};
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pcie-controller {
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compatible = "marvell,kirkwood-pcie";
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status = "disabled";
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x00 0xff>;
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ranges = <0x82000000 0 0x00040000 0x00040000 0 0x00002000 /* Port 0.0 registers */
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0x82000000 0 0x00044000 0x00044000 0 0x00002000 /* Port 1.0 registers */
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0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
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0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
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pcie@1,0 {
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device_type = "pci";
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assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
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reg = <0x0800 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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ranges;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &intc 9>;
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marvell,pcie-port = <0>;
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marvell,pcie-lane = <0>;
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clocks = <&gate_clk 2>;
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status = "disabled";
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};
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pcie@2,0 {
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device_type = "pci";
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assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
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reg = <0x1000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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ranges;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &intc 10>;
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marvell,pcie-port = <1>;
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marvell,pcie-lane = <0>;
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clocks = <&gate_clk 18>;
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status = "disabled";
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};
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};
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};
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};
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@ -19,6 +19,7 @@
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ocp@f1000000 {
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compatible = "simple-bus";
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ranges = <0x00000000 0xf1000000 0x4000000
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0xe0000000 0xe0000000 0x8100000 /* PCIE */
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0xf5000000 0xf5000000 0x0000400>;
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#address-cells = <1>;
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#size-cells = <1>;
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