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drm/i915/execlists: Include reset depth in traces

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Show the reset depth (the tasklet disable count) in the GEM_TRACE to
indicate when we might not expect tasklets to be flushed.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180815135827.25869-1-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson 2018-08-15 14:58:27 +01:00
parent dce888798d
commit 66fc82960c
1 changed files with 4 additions and 2 deletions
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6
drivers/gpu/drm/i915/intel_lrc.c
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@ -1828,7 +1828,8 @@ execlists_reset_prepare(struct intel_engine_cs *engine)
struct i915_request *request, *active;
unsigned long flags;
GEM_TRACE("%s\n", engine->name);
GEM_TRACE("%s: depth<-%d\n", engine->name,
atomic_read(&execlists->tasklet.count));
/*
* Prevent request submission to the hardware until we have
@ -1976,7 +1977,8 @@ static void execlists_reset_finish(struct intel_engine_cs *engine)
*/
__tasklet_enable_sync_once(&execlists->tasklet);
GEM_TRACE("%s\n", engine->name);
GEM_TRACE("%s: depth->%d\n", engine->name,
atomic_read(&execlists->tasklet.count));
}
static int intel_logical_ring_emit_pdps(struct i915_request *rq)