ARM: dts: rockchip: add phandles to secondary cpu cores

Add phandles to secondary cpu cores as we may need to reference these
down the road as well.

Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
This commit is contained in:
Heiko Stuebner 2018-10-15 14:46:19 +02:00 committed by Heiko Stuebner
parent 0222aac448
commit 66dc478a28

View File

@ -28,7 +28,7 @@
operating-points-v2 = <&cpu0_opp_table>; operating-points-v2 = <&cpu0_opp_table>;
resets = <&cru SRST_CORE0>; resets = <&cru SRST_CORE0>;
}; };
cpu@1 { cpu1: cpu@1 {
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
next-level-cache = <&L2>; next-level-cache = <&L2>;
@ -36,7 +36,7 @@
operating-points-v2 = <&cpu0_opp_table>; operating-points-v2 = <&cpu0_opp_table>;
resets = <&cru SRST_CORE1>; resets = <&cru SRST_CORE1>;
}; };
cpu@2 { cpu2: cpu@2 {
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
next-level-cache = <&L2>; next-level-cache = <&L2>;
@ -44,7 +44,7 @@
operating-points-v2 = <&cpu0_opp_table>; operating-points-v2 = <&cpu0_opp_table>;
resets = <&cru SRST_CORE2>; resets = <&cru SRST_CORE2>;
}; };
cpu@3 { cpu3: cpu@3 {
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
next-level-cache = <&L2>; next-level-cache = <&L2>;