drm/nouveau/mc/nv11: define reset masks + intr cleanup
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
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79360b7d5f
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667e99ab23
@ -14,6 +14,7 @@ void nvkm_mc_reset(struct nvkm_mc *, enum nvkm_devidx);
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void nvkm_mc_unk260(struct nvkm_mc *, u32 data);
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void nvkm_mc_unk260(struct nvkm_mc *, u32 data);
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int nv04_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
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int nv04_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
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int nv11_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
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int nv17_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
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int nv17_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
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int nv44_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
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int nv44_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
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int nv50_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
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int nv50_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
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@ -146,7 +146,7 @@ nv11_chipset = {
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.gpio = nv10_gpio_new,
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.gpio = nv10_gpio_new,
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.i2c = nv04_i2c_new,
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.i2c = nv04_i2c_new,
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.imem = nv04_instmem_new,
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.imem = nv04_instmem_new,
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.mc = nv04_mc_new,
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.mc = nv11_mc_new,
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.mmu = nv04_mmu_new,
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.mmu = nv04_mmu_new,
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.pci = nv04_pci_new,
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.pci = nv04_pci_new,
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.timer = nv04_timer_new,
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.timer = nv04_timer_new,
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@ -1,5 +1,6 @@
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nvkm-y += nvkm/subdev/mc/base.o
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nvkm-y += nvkm/subdev/mc/base.o
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nvkm-y += nvkm/subdev/mc/nv04.o
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nvkm-y += nvkm/subdev/mc/nv04.o
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nvkm-y += nvkm/subdev/mc/nv11.o
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nvkm-y += nvkm/subdev/mc/nv17.o
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nvkm-y += nvkm/subdev/mc/nv17.o
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nvkm-y += nvkm/subdev/mc/nv44.o
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nvkm-y += nvkm/subdev/mc/nv44.o
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nvkm-y += nvkm/subdev/mc/nv50.o
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nvkm-y += nvkm/subdev/mc/nv50.o
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@ -23,6 +23,13 @@
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*/
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*/
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#include "priv.h"
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#include "priv.h"
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const struct nvkm_mc_map
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nv04_mc_reset[] = {
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{ 0x00001000, NVKM_ENGINE_GR },
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{ 0x00000100, NVKM_ENGINE_FIFO },
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{}
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};
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const struct nvkm_mc_map
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const struct nvkm_mc_map
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nv04_mc_intr[] = {
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nv04_mc_intr[] = {
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{ 0x00000001, NVKM_ENGINE_MPEG }, /* NV17- MPEG/ME */
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{ 0x00000001, NVKM_ENGINE_MPEG }, /* NV17- MPEG/ME */
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50
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv11.c
Normal file
50
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv11.c
Normal file
@ -0,0 +1,50 @@
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/*
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* Copyright 2016 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs <bskeggs@redhat.com>
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*/
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#include "priv.h"
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static const struct nvkm_mc_map
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nv11_mc_intr[] = {
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{ 0x03010000, NVKM_ENGINE_DISP },
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{ 0x00001000, NVKM_ENGINE_GR },
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{ 0x00000100, NVKM_ENGINE_FIFO },
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{ 0x10000000, NVKM_SUBDEV_BUS },
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{ 0x00100000, NVKM_SUBDEV_TIMER },
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{}
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};
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static const struct nvkm_mc_func
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nv11_mc = {
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.init = nv04_mc_init,
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.intr = nv11_mc_intr,
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.intr_unarm = nv04_mc_intr_unarm,
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.intr_rearm = nv04_mc_intr_rearm,
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.intr_mask = nv04_mc_intr_mask,
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.reset = nv04_mc_reset,
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};
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int
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nv11_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
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{
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return nvkm_mc_new_(&nv11_mc, device, index, pmc);
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}
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@ -29,6 +29,7 @@ extern const struct nvkm_mc_map nv04_mc_intr[];
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void nv04_mc_intr_unarm(struct nvkm_mc *);
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void nv04_mc_intr_unarm(struct nvkm_mc *);
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void nv04_mc_intr_rearm(struct nvkm_mc *);
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void nv04_mc_intr_rearm(struct nvkm_mc *);
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u32 nv04_mc_intr_mask(struct nvkm_mc *);
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u32 nv04_mc_intr_mask(struct nvkm_mc *);
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extern const struct nvkm_mc_map nv04_mc_reset[];
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extern const struct nvkm_mc_map nv17_mc_intr[];
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extern const struct nvkm_mc_map nv17_mc_intr[];
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extern const struct nvkm_mc_map nv17_mc_reset[];
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extern const struct nvkm_mc_map nv17_mc_reset[];
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