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ARM: Remove PicoXcell platform support

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PicoXcell has had nothing but treewide cleanups for at least the last 8
years and no signs of activity. The most recent activity is a yocto vendor
kernel based on v3.0 in 2015.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Jamie Iles <jamie@jamieiles.com>
Cc: Russell King <linux@armlinux.org.uk>
Link: https://lore.kernel.org/r/20201210200315.2965567-3-robh@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Rob Herring 2020-12-10 14:03:13 -06:00 committed by Arnd Bergmann
parent 0c08a1c1d7
commit 665a8799b0
7 changed files with 1 additions and 116 deletions
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9
MAINTAINERS
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@ -13984,15 +13984,6 @@ L: linux-input@vger.kernel.org
S: Maintained
F: drivers/hid/hid-picolcd*
PICOXCELL SUPPORT
M: Jamie Iles <jamie@jamieiles.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Supported
T: git git://github.com/jamieiles/linux-2.6-ji.git
F: arch/arm/boot/dts/picoxcell*
F: arch/arm/mach-picoxcell/
F: drivers/crypto/picoxcell*
PIDFD API
M: Christian Brauner <christian@brauner.io>
L: linux-kernel@vger.kernel.org

2
arch/arm/Kconfig
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@ -671,8 +671,6 @@ source "arch/arm/mach-orion5x/Kconfig"
source "arch/arm/mach-oxnas/Kconfig"
source "arch/arm/mach-picoxcell/Kconfig"
source "arch/arm/mach-prima2/Kconfig"
source "arch/arm/mach-pxa/Kconfig"

13
arch/arm/Kconfig.debug
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@ -770,14 +770,6 @@ choice
depends on ARCH_OMAP2PLUS
select DEBUG_OMAP2PLUS_UART
config DEBUG_PICOXCELL_UART
depends on ARCH_PICOXCELL
bool "Use PicoXcell UART for low-level debug"
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
on PicoXcell based platforms.
config DEBUG_PXA_UART1
depends on ARCH_PXA
bool "Use PXA UART1 for low-level debug"
@ -1717,7 +1709,6 @@ config DEBUG_UART_PHYS
default 0x80010000 if DEBUG_ASM9260_UART
default 0x80070000 if DEBUG_IMX23_UART
default 0x80074000 if DEBUG_IMX28_UART
default 0x80230000 if DEBUG_PICOXCELL_UART
default 0x808c0000 if DEBUG_EP93XX || ARCH_EP93XX
default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART
default 0xb0060000 if DEBUG_SIRFPRIMA2_UART1
@ -1850,7 +1841,6 @@ config DEBUG_UART_VIRT
default 0xfe017000 if DEBUG_MMP_UART2
default 0xfe018000 if DEBUG_MMP_UART3
default 0xfe100000 if DEBUG_IMX23_UART || DEBUG_IMX28_UART
default 0xfe230000 if DEBUG_PICOXCELL_UART
default 0xfe300000 if DEBUG_BCM_KONA_UART
default 0xfe800000 if ARCH_IOP32X
default 0xfeb00000 if DEBUG_HI3620_UART || DEBUG_HIX5HD2_UART
@ -1905,8 +1895,7 @@ config DEBUG_UART_8250_WORD
bool "Use 32-bit accesses for 8250 UART"
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
depends on DEBUG_UART_8250_SHIFT >= 2
default y if DEBUG_PICOXCELL_UART || \
DEBUG_SOCFPGA_UART0 || DEBUG_SOCFPGA_ARRIA10_UART1 || \
default y if DEBUG_SOCFPGA_UART0 || DEBUG_SOCFPGA_ARRIA10_UART1 || \
DEBUG_SOCFPGA_CYCLONE5_UART1 || DEBUG_KEYSTONE_UART0 || \
DEBUG_KEYSTONE_UART1 || DEBUG_ALPINE_UART0 || \
DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \

1
arch/arm/Makefile
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@ -199,7 +199,6 @@ machine-$(CONFIG_ARCH_OXNAS) += oxnas
machine-$(CONFIG_ARCH_OMAP1) += omap1
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_ORION5X) += orion5x
machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell
machine-$(CONFIG_ARCH_PXA) += pxa
machine-$(CONFIG_ARCH_QCOM) += qcom
machine-$(CONFIG_ARCH_RDA) += rda

9
arch/arm/mach-picoxcell/Kconfig
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@ -1,9 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only
config ARCH_PICOXCELL
bool "Picochip PicoXcell"
depends on ARCH_MULTI_V6
select ARM_VIC
select DW_APB_TIMER_OF
select GPIOLIB
select HAVE_TCM
select NO_IOPORT_MAP

2
arch/arm/mach-picoxcell/Makefile
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@ -1,2 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-y := common.o

81
arch/arm/mach-picoxcell/common.c
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@ -1,81 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
*
* All enquiries to support@picochip.com
*/
#include <linux/delay.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/reboot.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000)
#define PICOXCELL_PERIPH_BASE 0x80000000
#define PICOXCELL_PERIPH_LENGTH SZ_4M
#define WDT_CTRL_REG_EN_MASK (1 << 0)
#define WDT_CTRL_REG_OFFS (0x00)
#define WDT_TIMEOUT_REG_OFFS (0x04)
static void __iomem *wdt_regs;
/*
* The machine restart method can be called from an atomic context so we won't
* be able to ioremap the regs then.
*/
static void picoxcell_setup_restart(void)
{
struct device_node *np = of_find_compatible_node(NULL, NULL,
"snps,dw-apb-wdg");
if (WARN(!np, "unable to setup watchdog restart"))
return;
wdt_regs = of_iomap(np, 0);
WARN(!wdt_regs, "failed to remap watchdog regs");
}
static struct map_desc io_map __initdata = {
.virtual = PHYS_TO_IO(PICOXCELL_PERIPH_BASE),
.pfn = __phys_to_pfn(PICOXCELL_PERIPH_BASE),
.length = PICOXCELL_PERIPH_LENGTH,
.type = MT_DEVICE,
};
static void __init picoxcell_map_io(void)
{
iotable_init(&io_map, 1);
}
static void __init picoxcell_init_machine(void)
{
picoxcell_setup_restart();
}
static const char *picoxcell_dt_match[] = {
"picochip,pc3x2",
"picochip,pc3x3",
NULL
};
static void picoxcell_wdt_restart(enum reboot_mode mode, const char *cmd)
{
/*
* Configure the watchdog to reset with the shortest possible timeout
* and give it chance to do the reset.
*/
if (wdt_regs) {
writel_relaxed(WDT_CTRL_REG_EN_MASK, wdt_regs + WDT_CTRL_REG_OFFS);
writel_relaxed(0, wdt_regs + WDT_TIMEOUT_REG_OFFS);
/* No sleeping, possibly atomic. */
mdelay(500);
}
}
DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
.map_io = picoxcell_map_io,
.init_machine = picoxcell_init_machine,
.dt_compat = picoxcell_dt_match,
.restart = picoxcell_wdt_restart,
MACHINE_END