ARC: create cpu specific version of arch_cpu_idle()
This paves way for creating a 3rd variant needed for NPS ARC700 without littering ifdey'ery all over the place Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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@@ -47,9 +47,6 @@
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#define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | STATUS_AD_MASK | \
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#define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | STATUS_AD_MASK | \
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(ARCV2_IRQ_DEF_PRIO << 1))
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(ARCV2_IRQ_DEF_PRIO << 1))
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/* SLEEP needs default irq priority (<=) which can interrupt the doze */
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#define ISA_SLEEP_ARG (0x10 | ARCV2_IRQ_DEF_PRIO)
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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/*
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/*
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@@ -43,8 +43,6 @@
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#define ISA_INIT_STATUS_BITS STATUS_IE_MASK
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#define ISA_INIT_STATUS_BITS STATUS_IE_MASK
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#define ISA_SLEEP_ARG 0x3
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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/******************************************************************
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/******************************************************************
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@@ -79,15 +79,29 @@ done:
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return uval;
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return uval;
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}
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}
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#ifdef CONFIG_ISA_ARCV2
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void arch_cpu_idle(void)
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void arch_cpu_idle(void)
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{
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{
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/* sleep, but enable all interrupts before committing */
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/* Re-enable interrupts <= default irq priority before commiting SLEEP */
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const unsigned int arg = 0x10 | ARCV2_IRQ_DEF_PRIO;
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__asm__ __volatile__(
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__asm__ __volatile__(
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"sleep %0 \n"
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"sleep %0 \n"
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:
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:
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:"I"(ISA_SLEEP_ARG)); /* can't be "r" has to be embedded const */
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:"I"(arg)); /* can't be "r" has to be embedded const */
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}
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}
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#else
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void arch_cpu_idle(void)
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{
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/* sleep, but enable both set E1/E2 (levels of interrutps) before committing */
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__asm__ __volatile__("sleep 0x3 \n");
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}
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#endif
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asmlinkage void ret_from_fork(void);
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asmlinkage void ret_from_fork(void);
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/*
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/*
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