mtd: rawnand: Remove docg4

The diskonchip G4 driver does not fit very well in the raw/parallel
NAND framework simply because such chips have an internal controller
translating DoC-specific commands into NAND ones.

Keeping such a driver in the raw NAND framework is a real burden for
NAND maintainers.

Not to mention that some parts of this driver are a bit worrisome:

- writes are done by subpages, even though we're interfacing with an MLC
  chip which are known to not support subpage writes very well (it might
  be that the FTL handles the complexity for us though)

- some part of the code are simply ignoring return codes of function that
  can fail in a few occasions

- there's a hack to support OOB writes when no data is provided. This
  operation is not supported by the chip and should have been rejected,
  and nandwrite and other userspace tools should have been patched to
  deal with such devices

- the driver is apparently broken when ignore_badblocks module param
  is not set to 1 and nobody noticed that (don't know since when this
  is the case, but it's not a recent change)
  http://lists.infradead.org/pipermail/linux-mtd/2018-July/082472.html

Add to that the fact that we already have a docg3 driver in
drivers/mtd/devices/docg3.c and, looking at the code (and regs), it
seems docg3 and docg4 have a lot in common (even the author of this
driver seemed to have realized that interfacing with the raw NAND
framework might have been a bad idea
http://lists.infradead.org/pipermail/linux-mtd/2012-January/039517.html).

For all these reasons, I'm proposing to remove this driver. If anyone
ever wants to add support for this chip back, I'd suggest extending
the docg3 driver instead of adding a completely new driver.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Cc: Mike Dunn <mikedunn@newsguy.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Sergey Larin <cerg2010cerg2010@mail.ru>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
This commit is contained in:
Boris Brezillon 2018-08-04 22:59:20 +02:00 committed by Miquel Raynal
parent 7fd130f741
commit 64ddd5d857
3 changed files with 0 additions and 1458 deletions

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@ -227,26 +227,6 @@ config MTD_NAND_DISKONCHIP_BBTWRITE
load time (assuming you build diskonchip as a module) with the module load time (assuming you build diskonchip as a module) with the module
parameter "inftl_bbt_write=1". parameter "inftl_bbt_write=1".
config MTD_NAND_DOCG4
tristate "Support for DiskOnChip G4"
depends on HAS_IOMEM
select BCH
select BITREVERSE
help
Support for diskonchip G4 nand flash, found in various smartphones and
PDAs, among them the Palm Treo680, HTC Prophet and Wizard, Toshiba
Portege G900, Asus P526, and O2 XDA Zinc.
With this driver you will be able to use UBI and create a ubifs on the
device, so you may wish to consider enabling UBI and UBIFS as well.
These devices ship with the Mys/Sandisk SAFTL formatting, for which
there is currently no mtd parser, so you may want to use command line
partitioning to segregate write-protected blocks. On the Treo680, the
first five erase blocks (256KiB each) are write-protected, followed
by the block containing the saftl partition table. This is probably
typical.
config MTD_NAND_SHARPSL config MTD_NAND_SHARPSL
tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)" tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)"
depends on ARCH_PXA || COMPILE_TEST depends on ARCH_PXA || COMPILE_TEST

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@ -15,7 +15,6 @@ obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o
obj-$(CONFIG_MTD_NAND_TANGO) += tango_nand.o obj-$(CONFIG_MTD_NAND_TANGO) += tango_nand.o
obj-$(CONFIG_MTD_NAND_DAVINCI) += davinci_nand.o obj-$(CONFIG_MTD_NAND_DAVINCI) += davinci_nand.o
obj-$(CONFIG_MTD_NAND_DISKONCHIP) += diskonchip.o obj-$(CONFIG_MTD_NAND_DISKONCHIP) += diskonchip.o
obj-$(CONFIG_MTD_NAND_DOCG4) += docg4.o
obj-$(CONFIG_MTD_NAND_FSMC) += fsmc_nand.o obj-$(CONFIG_MTD_NAND_FSMC) += fsmc_nand.o
obj-$(CONFIG_MTD_NAND_SHARPSL) += sharpsl.o obj-$(CONFIG_MTD_NAND_SHARPSL) += sharpsl.o
obj-$(CONFIG_MTD_NAND_NANDSIM) += nandsim.o obj-$(CONFIG_MTD_NAND_NANDSIM) += nandsim.o

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