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Merge tag 'mvebu-dt-3.15-4' of git://git.infradead.org/linux-mvebu into next/dt

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Merge "mvebu dt changes for v3.15 (incremental #4)" from Jason Cooper:

 - dove
    - add system controller node
    - drop pinctrl PMU reg property _before_ it hits mainline and becomes ABI

 - mvebu
    - XP/370
       - change default PCIe apertures
       - switch GP and DB boards internal registers to 0xf1000000
       - correct RAM size on Matrix board
    - 385
       - correct phy connection type for DB board
       - add RD board

* tag 'mvebu-dt-3.15-4' of git://git.infradead.org/linux-mvebu:
  ARM: dove: drop pinctrl PMU reg property
  ARM: mvebu: add Device Tree for the Armada 385 RD board
  ARM: mvebu: use the correct phy connection mode on Armada 385 DB
  ARM: mvebu: the Armada XP Matrix board has 4 GB
  ARM: mvebu: switch the Armada XP GP to use internal registers at 0xf1000000
  ARM: mvebu: switch the Armada XP DB to use internal registers at 0xf1000000
  ARM: mvebu: change the default PCIe apertures for Armada 370/XP
  ARM: dove: add system controller node

Conflicts:
	arch/arm/boot/dts/Makefile

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2014-03-17 11:07:25 +01:00
commit 64d865f403
8 changed files with 144 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
arch/arm/boot/dts/Makefile
View File

@ -55,11 +55,6 @@ dtb-$(CONFIG_ARCH_BERLIN) += \
berlin2cd-google-chromecast.dtb
dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
da850-evm.dtb
dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \
dove-cubox.dtb \
dove-d2plug.dtb \
dove-d3plug.dtb \
dove-dove-db.dtb
dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb
dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
exynos4210-smdkv310.dtb \
@ -378,7 +373,8 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \
dtb-$(CONFIG_MACH_ARMADA_375) += \
armada-375-db.dtb
dtb-$(CONFIG_MACH_ARMADA_38X) += \
armada-385-db.dtb
armada-385-db.dtb \
armada-385-rd.dtb
dtb-$(CONFIG_MACH_ARMADA_XP) += \
armada-xp-axpwifiap.dtb \
armada-xp-db.dtb \
@ -386,6 +382,11 @@ dtb-$(CONFIG_MACH_ARMADA_XP) += \
armada-xp-netgear-rn2120.dtb \
armada-xp-matrix.dtb \
armada-xp-openblocks-ax3-4.dtb
dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \
dove-cubox.dtb \
dove-d2plug.dtb \
dove-d3plug.dtb \
dove-dove-db.dtb
targets += dtbs
targets += $(dtb-y)

4
arch/arm/boot/dts/armada-370-xp.dtsi
View File

@ -44,8 +44,8 @@
#size-cells = <1>;
controller = <&mbusc>;
interrupt-parent = <&mpic>;
pcie-mem-aperture = <0xe0000000 0x8000000>;
pcie-io-aperture = <0xe8000000 0x100000>;
pcie-mem-aperture = <0xf8000000 0x7e00000>;
pcie-io-aperture = <0xffe00000 0x100000>;
devbus-bootcs {
compatible = "marvell,mvebu-devbus";

4
arch/arm/boot/dts/armada-385-db.dts
View File

@ -62,13 +62,13 @@
ethernet@30000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
};
ethernet@70000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
};
mdio {

94
arch/arm/boot/dts/armada-385-rd.dts Normal file
View File

@ -0,0 +1,94 @@
/*
* Device Tree file for Marvell Armada 385 Reference Design board
* (RD-88F6820-AP)
*
* Copyright (C) 2014 Marvell
*
* Gregory CLEMENT <gregory.clement@free-electrons.com>
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/dts-v1/;
#include "armada-385.dtsi"
/ {
model = "Marvell Armada 385 Reference Design";
compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada38x";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
};
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>; /* 256 MB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
internal-regs {
spi@10600 {
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p128";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <108000000>;
};
};
i2c@11000 {
status = "okay";
clock-frequency = <100000>;
};
serial@12000 {
clock-frequency = <200000000>;
status = "okay";
};
ethernet@30000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@70000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
};
};
pcie-controller {
status = "okay";
/*
* One PCIe units is accessible through
* standard PCIe slot on the board.
*/
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
};
};
};

13
arch/arm/boot/dts/armada-xp-db.dts
View File

@ -2,7 +2,7 @@
* Device Tree file for Marvell Armada XP evaluation board
* (DB-78460-BP)
*
* Copyright (C) 2012 Marvell
* Copyright (C) 2012-2014 Marvell
*
* Lior Amsalem <alior@marvell.com>
* Gregory CLEMENT <gregory.clement@free-electrons.com>
@ -11,6 +11,15 @@
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*
* Note: this Device Tree assumes that the bootloader has remapped the
* internal registers to 0xf1000000 (instead of the default
* 0xd0000000). The 0xf1000000 is the default used by the recent,
* DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
* boards were delivered with an older version of the bootloader that
* left internal registers mapped at 0xd0000000. If you are in this
* situation, you should either update your bootloader (preferred
* solution) or the below Device Tree should be adjusted.
*/
/dts-v1/;
@ -30,7 +39,7 @@
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>;

22
arch/arm/boot/dts/armada-xp-gp.dts
View File

@ -2,7 +2,7 @@
* Device Tree file for Marvell Armada XP development board
* (DB-MV784MP-GP)
*
* Copyright (C) 2013 Marvell
* Copyright (C) 2013-2014 Marvell
*
* Lior Amsalem <alior@marvell.com>
* Gregory CLEMENT <gregory.clement@free-electrons.com>
@ -11,6 +11,15 @@
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*
* Note: this Device Tree assumes that the bootloader has remapped the
* internal registers to 0xf1000000 (instead of the default
* 0xd0000000). The 0xf1000000 is the default used by the recent,
* DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
* boards were delivered with an older version of the bootloader that
* left internal registers mapped at 0xd0000000. If you are in this
* situation, you should either update your bootloader (preferred
* solution) or the below Device Tree should be adjusted.
*/
/dts-v1/;
@ -30,16 +39,17 @@
* 8 GB of plug-in RAM modules by default.The amount
* of memory available can be changed by the
* bootloader according the size of the module
* actually plugged. Only 7GB are usable because
* addresses from 0xC0000000 to 0xffffffff are used by
* the internal registers of the SoC.
* actually plugged. However, memory between
* 0xF0000000 to 0xFFFFFFFF cannot be used, as it is
* the address range used for I/O (internal registers,
* MBus windows).
*/
reg = <0x00000000 0x00000000 0x00000000 0xC0000000>,
reg = <0x00000000 0x00000000 0x00000000 0xf0000000>,
<0x00000001 0x00000000 0x00000001 0x00000000>;
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>;

7
arch/arm/boot/dts/armada-xp-matrix.dts
View File

@ -23,7 +23,12 @@
memory {
device_type = "memory";
reg = <0 0x00000000 0 0x80000000>; /* 2 GB */
/*
* This board has 4 GB of RAM, but the last 256 MB of
* RAM are not usable due to the overlap with the MBus
* Window address range
*/
reg = <0 0x00000000 0 0xf0000000>;
};
soc {

8
arch/arm/boot/dts/dove.dtsi
View File

@ -186,6 +186,11 @@
reg = <0x20000 0x80>, <0x800100 0x8>;
};
sysc: system-ctrl@20000 {
compatible = "marvell,orion-system-controller";
reg = <0x20000 0x110>;
};
bridge_intc: bridge-interrupt-ctrl@20110 {
compatible = "marvell,orion-bridge-intc";
interrupt-controller;
@ -390,8 +395,7 @@
pinctrl: pin-ctrl@d0200 {
compatible = "marvell,dove-pinctrl";
reg = <0xd0200 0x14>,
<0xd0440 0x04>,
<0xd802c 0x08>;
<0xd0440 0x04>;
clocks = <&gate_clk 22>;
pmx_gpio_0: pmx-gpio-0 {