forked from Minki/linux
staging: comedi: rtd520: tidy up block comments
Use the preferred block command style. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -209,12 +209,14 @@
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#define LAS1_HDIO_FIFO 0x0004 /* HiSpd DI FIFO (16bit) */
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#define LAS1_DAC_FIFO(x) (0x0008 + ((x) * 0x4)) /* D/Ax FIFO (16bit) */
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/*======================================================================
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Driver specific stuff (tunable)
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======================================================================*/
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/*
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* Driver specific stuff (tunable)
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*/
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/* We really only need 2 buffers. More than that means being much
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smarter about knowing which ones are full. */
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/*
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* We really only need 2 buffers. More than that means being much
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* smarter about knowing which ones are full.
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*/
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#define DMA_CHAIN_COUNT 2 /* max DMA segments/buffers in a ring (min 2) */
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/* Target period for periodic transfers. This sets the user read latency. */
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@ -226,9 +228,9 @@
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/* The board support a channel list up to the FIFO length (1K or 8K) */
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#define RTD_MAX_CHANLIST 128 /* max channel list that we allow */
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/*======================================================================
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Board specific stuff
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======================================================================*/
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/*
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* Board specific stuff
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*/
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#define RTD_CLOCK_RATE 8000000 /* 8Mhz onboard clock */
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#define RTD_CLOCK_BASE 125 /* clock period in ns */
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@ -257,9 +259,9 @@
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/* interrupt at end of block */ | PLX_INTR_TERM_COUNT \
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/* from board to PCI */ | PLX_XFER_LOCAL_TO_PCI)
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/*======================================================================
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Comedi specific stuff
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======================================================================*/
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/*
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* Comedi specific stuff
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*/
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/*
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* The board has 3 input modes and the gains of 1,2,4,...32 (, 64, 128)
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@ -377,11 +379,11 @@ struct rtd_private {
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#define DMA1_ACTIVE 0x04 /* DMA1 is active */
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/*
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Given a desired period and the clock period (both in ns),
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return the proper counter value (divider-1).
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Sets the original period to be the true value.
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Note: you have to check if the value is larger than the counter range!
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*/
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* Given a desired period and the clock period (both in ns), return the
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* proper counter value (divider-1). Sets the original period to be the
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* true value.
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* Note: you have to check if the value is larger than the counter range!
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*/
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static int rtd_ns_to_timer_base(unsigned int *nanosec,
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unsigned int flags, int base)
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{
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@ -402,26 +404,26 @@ static int rtd_ns_to_timer_base(unsigned int *nanosec,
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if (divider < 2)
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divider = 2; /* min is divide by 2 */
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/* Note: we don't check for max, because different timers
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have different ranges */
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/*
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* Note: we don't check for max, because different timers
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* have different ranges
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*/
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*nanosec = base * divider;
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return divider - 1; /* countdown is divisor+1 */
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}
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/*
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Given a desired period (in ns),
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return the proper counter value (divider-1) for the internal clock.
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Sets the original period to be the true value.
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*/
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* Given a desired period (in ns), return the proper counter value
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* (divider-1) for the internal clock. Sets the original period to
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* be the true value.
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*/
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static int rtd_ns_to_timer(unsigned int *ns, unsigned int flags)
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{
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return rtd_ns_to_timer_base(ns, flags, RTD_CLOCK_BASE);
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}
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/*
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Convert a single comedi channel-gain entry to a RTD520 table entry
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*/
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/* Convert a single comedi channel-gain entry to a RTD520 table entry */
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static unsigned short rtd_convert_chan_gain(struct comedi_device *dev,
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unsigned int chanspec, int index)
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{
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@ -466,9 +468,7 @@ static unsigned short rtd_convert_chan_gain(struct comedi_device *dev,
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return r;
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}
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/*
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Setup the channel-gain table from a comedi list
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*/
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/* Setup the channel-gain table from a comedi list */
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static void rtd_load_channelgain_list(struct comedi_device *dev,
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unsigned int n_chan, unsigned int *list)
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{
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@ -488,8 +488,10 @@ static void rtd_load_channelgain_list(struct comedi_device *dev,
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}
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}
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/* determine fifo size by doing adc conversions until the fifo half
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empty status flag clears */
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/*
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* Determine fifo size by doing adc conversions until the fifo half
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* empty status flag clears.
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*/
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static int rtd520_probe_fifo_depth(struct comedi_device *dev)
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{
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unsigned int chanspec = CR_PACK(0, 0, AREF_GROUND);
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@ -972,8 +974,10 @@ static int rtd_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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}
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/* end configuration */
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/* This doesn't seem to work. There is no way to clear an interrupt
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that the priority controller has queued! */
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/*
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* This doesn't seem to work. There is no way to clear an interrupt
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* that the priority controller has queued!
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*/
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writew(~0, dev->mmio + LAS0_CLEAR);
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readw(dev->mmio + LAS0_CLEAR);
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