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MLK-11374: ARM: dts: add NAND support for i.MX6UL ddr3 arm2 board

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Add GPMI NAND support for i.MX6UL 14x14 ddr3 arm2 board.

Signed-off-by: Han Xu <b45815@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
This commit is contained in:
Fugang Duan 2015-08-18 15:55:26 +08:00 committed by Nitin Garg
parent 59c10c7fde
commit 627cdd6ee2
2 changed files with 35 additions and 0 deletions
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1
arch/arm/boot/dts/Makefile
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@ -315,6 +315,7 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
imx6sx-sdb.dtb
dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ul-14x14-ddr3-arm2.dtb \
imx6ul-14x14-ddr3-arm2-gpmi-weim.dtb \
imx6ul-14x14-evk.dtb
dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-12x12-lpddr3-arm2.dtb \

34
arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2-gpmi-weim.dts Normal file
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@ -0,0 +1,34 @@
/*
* Copyright (C) 2015 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "imx6ul-14x14-ddr3-arm2.dts"
/*
* solve pin conflict with NAND
*
* USDHC2_CD, SD2_RST_B, USDHC2_WP conflict with RAWNAND CE pins , also
* overwritten the conflict of SD2_RST_B with RAWNAND ALE in hog
* QSPI CLK, CE and DATA pins conflict with RAWNAND data pins and CE, CLE, RB,
* WP, DQS pin
*
*/
&iomuxc {
pinctrl-0 = <&pinctrl_hog>;
};
&qspi{
status = "disabled";
};
&gpmi{
status = "okay";
};
&usdhc2 {
status = "disabled";
};