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drm/amdgpu: enable dynamic GECC support (v2)

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Dynamic GECC allows user to specify GECC enablement
status, which will take effect in next boot cycle.

v2: initialize boot_cfg to 0xFF

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Hawking Zhang
2021-06-07 20:17:02 +08:00
committed by Alex Deucher
parent c664223491
commit 6246a416eb
1 changed files with 47 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

57
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
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@@ -1235,19 +1235,62 @@ static int psp_ras_terminate(struct psp_context *psp)
static int psp_ras_initialize(struct psp_context *psp) static int psp_ras_initialize(struct psp_context *psp)
{ {
int ret; int ret;
uint32_t boot_cfg = 0xFF;
struct amdgpu_device *adev = psp->adev;
/* /*
* TODO: bypass the initialize in sriov for now * TODO: bypass the initialize in sriov for now
*/ */
if (amdgpu_sriov_vf(psp->adev)) if (amdgpu_sriov_vf(adev))
return 0; return 0;
if (!psp->adev->psp.ta_ras_ucode_size || if (!adev->psp.ta_ras_ucode_size ||
!psp->adev->psp.ta_ras_start_addr) { !adev->psp.ta_ras_start_addr) {
dev_info(psp->adev->dev, "RAS: optional ras ta ucode is not available\n"); dev_info(adev->dev, "RAS: optional ras ta ucode is not available\n");
return 0; return 0;
} }
if (amdgpu_atomfirmware_dynamic_boot_config_supported(adev)) {
/* query GECC enablement status from boot config
* boot_cfg: 1: GECC is enabled or 0: GECC is disabled
*/
ret = psp_boot_config_get(adev, &boot_cfg);
if (ret)
dev_warn(adev->dev, "PSP get boot config failed\n");
if (!amdgpu_ras_is_supported(psp->adev, AMDGPU_RAS_BLOCK__UMC)) {
if (!boot_cfg) {
dev_info(adev->dev, "GECC is disabled\n");
} else {
/* disable GECC in next boot cycle if ras is
* disabled by module parameter amdgpu_ras_enable
* and/or amdgpu_ras_mask, or boot_config_get call
* is failed
*/
ret = psp_boot_config_set(adev, 0);
if (ret)
dev_warn(adev->dev, "PSP set boot config failed\n");
else
dev_warn(adev->dev, "GECC will be disabled in next boot cycle "
"if set amdgpu_ras_enable and/or amdgpu_ras_mask to 0x0\n");
}
} else {
if (1 == boot_cfg) {
dev_info(adev->dev, "GECC is enabled\n");
} else {
/* enable GECC in next boot cycle if it is disabled
* in boot config, or force enable GECC if failed to
* get boot configuration
*/
ret = psp_boot_config_set(adev, BOOT_CONFIG_GECC);
if (ret)
dev_warn(adev->dev, "PSP set boot config failed\n");
else
dev_warn(adev->dev, "GECC will be enabled in next boot cycle\n");
}
}
}
if (!psp->ras.ras_initialized) { if (!psp->ras.ras_initialized) {
ret = psp_ras_init_shared_buf(psp); ret = psp_ras_init_shared_buf(psp);
if (ret) if (ret)
@@ -1968,12 +2011,6 @@ static int psp_hw_start(struct psp_context *psp)
return ret; return ret;
} }
if (amdgpu_atomfirmware_dynamic_boot_config_supported(adev)) {
ret = psp_boot_config_set(adev, BOOT_CONFIG_GECC);
if (ret)
dev_warn(adev->dev, "PSP set boot config failed\n");
}
ret = psp_tmr_init(psp); ret = psp_tmr_init(psp);
if (ret) { if (ret) {
DRM_ERROR("PSP tmr init failed!\n"); DRM_ERROR("PSP tmr init failed!\n");