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drm/amdgpu: drop useless BACO arg in amdgpu_ras_reset_gpu

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BACO reset mode strategy is determined by latter func when
calling amdgpu_ras_reset_gpu. So not to confuse audience, drop
it.

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Guchun Chen 2019-12-13 16:46:05 +08:00 committed by Alex Deucher
parent a771ded8b7
commit 6193462409
6 changed files with 7 additions and 8 deletions
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2
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
View File

@ -641,7 +641,7 @@ int amdgpu_gfx_process_ras_data_cb(struct amdgpu_device *adev,
kgd2kfd_set_sram_ecc_flag(adev->kfd.dev);
if (adev->gfx.funcs->query_ras_error_count)
adev->gfx.funcs->query_ras_error_count(adev, err_data);
amdgpu_ras_reset_gpu(adev, 0);
amdgpu_ras_reset_gpu(adev);
}
return AMDGPU_RAS_SUCCESS;
}

4
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
View File

@ -1870,7 +1870,7 @@ void amdgpu_ras_resume(struct amdgpu_device *adev)
* See feature_enable_on_boot
*/
amdgpu_ras_disable_all_features(adev, 1);
amdgpu_ras_reset_gpu(adev, 0);
amdgpu_ras_reset_gpu(adev);
}
}
@ -1933,6 +1933,6 @@ void amdgpu_ras_global_ras_isr(struct amdgpu_device *adev)
if (atomic_cmpxchg(&amdgpu_ras_in_intr, 0, 1) == 0) {
DRM_WARN("RAS event of type ERREVENT_ATHUB_INTERRUPT detected!\n");
amdgpu_ras_reset_gpu(adev, false);
amdgpu_ras_reset_gpu(adev);
}
}

3
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
View File

@ -494,8 +494,7 @@ int amdgpu_ras_add_bad_pages(struct amdgpu_device *adev,
int amdgpu_ras_reserve_bad_pages(struct amdgpu_device *adev);
static inline int amdgpu_ras_reset_gpu(struct amdgpu_device *adev,
bool is_baco)
static inline int amdgpu_ras_reset_gpu(struct amdgpu_device *adev)
{
struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);

2
drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
View File

@ -160,7 +160,7 @@ int amdgpu_sdma_process_ras_data_cb(struct amdgpu_device *adev,
struct amdgpu_iv_entry *entry)
{
kgd2kfd_set_sram_ecc_flag(adev->kfd.dev);
amdgpu_ras_reset_gpu(adev, 0);
amdgpu_ras_reset_gpu(adev);
return AMDGPU_RAS_SUCCESS;
}

2
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c
View File

@ -132,7 +132,7 @@ int amdgpu_umc_process_ras_data_cb(struct amdgpu_device *adev,
err_data->err_addr_cnt))
DRM_WARN("Failed to add ras bad page!\n");
amdgpu_ras_reset_gpu(adev, 0);
amdgpu_ras_reset_gpu(adev);
}
kfree(err_data->err_addr);

2
drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
View File

@ -339,7 +339,7 @@ static void nbio_v7_4_handle_ras_controller_intr_no_bifring(struct amdgpu_device
/* ras_controller_int is dedicated for nbif ras error,
* not the global interrupt for sync flood
*/
amdgpu_ras_reset_gpu(adev, true);
amdgpu_ras_reset_gpu(adev);
}
}